DSPIC33FJ64GS406T-I/MR Microchip Technology, DSPIC33FJ64GS406T-I/MR Datasheet - Page 114

MCU/DSP 16BIT 64KB FLASH 64QFN

DSPIC33FJ64GS406T-I/MR

Manufacturer Part Number
DSPIC33FJ64GS406T-I/MR
Description
MCU/DSP 16BIT 64KB FLASH 64QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ64GS406T-I/MR

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-VQFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SCI, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, QEI, POR, PWM, WDT
Number Of I /o
58
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Numeric And Arithmetic Format
Fixed-Point or Floating-Point
Instruction Set Architecture
Harvard
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
58
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
EXAMPLE 5-2:
EXAMPLE 5-3:
DS70591C-page 114
; Set up NVMCON for row programming operations
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 63rd_program_word
2nd_program_word
MOV
MOV
MOV
MOV
MOV
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
#0x4001, W0
W0, NVMCON
#0x0000, W0
W0, TBLPAG
#0x6000, W0
#LOW_WORD_0, W2
#HIGH_BYTE_0, W3
#LOW_WORD_1, W2
#HIGH_BYTE_1, W3
#LOW_WORD_2, W2
#HIGH_BYTE_2, W3
#LOW_WORD_31, W2
#HIGH_BYTE_31, W3
#5
#0x55, W0
W0, NVMKEY
#0xAA, W1
W1, NVMKEY
NVMCON, #WR
LOADING THE WRITE BUFFERS
INITIATING A PROGRAMMING SEQUENCE
Preliminary
;
; Initialize NVMCON
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 55 key
;
; Write the AA key
; Start the erase sequence
; Insert two NOPs after the
; erase command is asserted
 2010 Microchip Technology Inc.

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