DSPIC33FJ64GS406T-I/MR Microchip Technology, DSPIC33FJ64GS406T-I/MR Datasheet - Page 3

MCU/DSP 16BIT 64KB FLASH 64QFN

DSPIC33FJ64GS406T-I/MR

Manufacturer Part Number
DSPIC33FJ64GS406T-I/MR
Description
MCU/DSP 16BIT 64KB FLASH 64QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ64GS406T-I/MR

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-VQFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SCI, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, QEI, POR, PWM, WDT
Number Of I /o
58
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Numeric And Arithmetic Format
Fixed-Point or Floating-Point
Instruction Set Architecture
Harvard
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
58
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Operating Range:
• Up to 40 MIPS operation (at 3.0-3.6V):
High-Performance DSC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set
• 16-bit wide data path
• 24-bit wide instructions
• Linear program memory addressing up to 4M
• Linear data memory addressing up to 64 Kbytes
• 83 base instructions: mostly 1 word/1 cycle
• Two 40-bit accumulators with rounding and
• Flexible and powerful addressing modes:
• Software stack
• 16 x 16 fractional/integer multiply operations
• 32/16 and 16/16 divide operations
• Single-cycle multiply and accumulate:
• Up to ±16-bit shifts for up to 40-bit data
Direct Memory Access (DMA):
• 4-channel hardware DMA
• 1 Kbyte dual ported DMA buffer area (DMA RAM)
• Most peripherals support DMA
 2010 Microchip Technology Inc.
- Industrial temperature range (-40°C to +85°C)
- Extended temperature range (-40°C to +125°C)
instruction words
saturation options
- Indirect
- Modulo
- Bit-Reversed
- Accumulator write back for DSP operations
- Dual data fetch
to store data transferred via DMA:
- Allows data transfer between RAM and a
peripheral while CPU is executing code (no
cycle stealing)
High-Performance, 16-Bit Digital Signal Controllers
dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610
Preliminary
Digital I/O:
• Up to 85 programmable digital I/O pins
• Wake-up/Interrupt-on-Change for up to 24 pins
• Output pins can drive voltage from 3.0V to 3.6V
• Up to 5V output with open drain configuration
• 5V tolerant digital input pins
• 16 mA source/sink on all PWM pins
On-Chip Flash and SRAM:
• Flash program memory (up to 64 Kbytes)
• Data SRAM (up to 8 Kbytes)
• Boot and General Security for program Flash
Peripheral Features:
• Timer/Counters, up to five 16-bit timers
• Input Capture (up to four channels):
• Output Compare (up to four channels):
• 4-wire SPI (up to two modules):
• I
- Can pair up to make one 32-bit timer
- Capture on up, down or both edges
- 16-bit capture input functions
- 4-deep FIFO on each capture
- Single or Dual 16-bit Compare mode
- 16-bit Glitchless PWM mode
- Framing supports I/O interface to simple
- 1-deep FIFO buffer
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
- Supports Full Multi-Master Slave mode
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
2
C™ (up to two modules):
codecs
sampling modes
DS70591C-page 3

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