DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 200

IC DSPIC MCU/DSP 12K 28QFN

DSPIC33FJ12MC202-I/ML

Manufacturer Part Number
DSPIC33FJ12MC202-I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28QFN EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
dsPIC33FJ12MC201/202
TABLE 20-2:
DS70265C-page 198
FNOSC<2:0>
FCKSM<1:0>
OSCIOFNC
GSS<1:0>
BSS<2:0>
IOL1WAY
Bit Field
BWRP
GWRP
IESO
dsPIC33F CONFIGURATION BITS DESCRIPTION
FOSCSEL
FOSCSEL
Register
FOSC
FOSC
FOSC
FGS
FBS
FBS
FGS
Boot Segment Program Flash Write Protection
1 = Boot segment can be written
0 = Boot segment is write-protected
Boot Segment Program Flash Code Protection Size
X11 = No Boot program Flash segment
Boot space is 256 Instruction Words (except interrupt vectors)
110 = Standard security; boot program Flash segment ends at
010 = High security; boot program Flash segment ends at 0x0003FE
Boot space is 768 Instruction Words (except interrupt vectors)
101 = Standard security; boot program Flash segment, ends at
001 = High security; boot program Flash segment ends at 0x0007FE
Boot space is 1792 Instruction Words (except interrupt vectors)
100 = Standard security; boot program Flash segment ends at
000 = High security; boot program Flash segment ends at 0x000FFE
General Segment Code-Protect bit
11 = User program memory is not code-protected
10 = Standard security
0x = High security
General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
Two-speed Oscillator Start-up Enable bit
1 = Start-up device with FRC, then automatically switch to the
0 = Start-up device with user-selected oscillator source
Initial Oscillator Source Selection bits
111 = Internal Fast RC (FRC) oscillator with postscaler
110 = Internal Fast RC (FRC) oscillator with divide-by-16
101 = LPRC oscillator
100 = Secondary (LP) oscillator
011 = Primary (XT, HS, EC) oscillator with PLL
010 = Primary (XT, HS, EC) oscillator
001 = Internal Fast RC (FRC) oscillator with PLL
000 = FRC oscillator
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral pin select configuration
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Preliminary
user-selected oscillator source when ready
0x0003FE
0x0007FE
0x000FFE
Description
© 2008 Microchip Technology Inc.

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