PIC16LC923-04/PT Microchip Technology, PIC16LC923-04/PT Datasheet - Page 58

• Manufacturer Part Number: PIC16LC923-04/PT
• Description: IC MCU OTP 4KX14 LCD DVR 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC923-04/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

PIC16C9XX
10.1
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RC2/CCP1 (Figure 10-2). An event is defined as:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set. It must
be cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value will be lost.
10.1.1
In capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
FIGURE 10-2: CAPTURE MODE OPERATION
10.1.2
Timer1 must be running in timer mode or synchronized
counter mode for the CCP module to use the capture
feature. In asynchronous counter mode the capture
operation may not work.
10.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep
enable bit CCP1IE (PIE1<2>) clear to avoid false inter-
rupts and should clear flag bit CCP1IF following any
such change in operating mode.
10.1.4
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. This means that any
reset will clear the prescaler counter.
DS30444E - page 58
RC2/CCP1
pin
Note:
Capture Mode
CCP PIN CONFIGURATION
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
CCP PRESCALER
If the RC2/CCP1 pin is configured as an
output, a write to the port can cause a cap-
ture condition.
edge detect
Q’s
Prescaler
1, 4, 16
CCP
and
CCP1CON<3:0>
BLOCK DIAGRAM
Set CCP1IF
PIR1<2>
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore the first capture may be from
a non-zero prescaler. Example 10-1 shows the recom-
mended method for switching between capture prescal-
ers. This example also clears the prescaler counter and
will not generate the “false” interrupt.
EXAMPLE 10-1: CHANGING BETWEEN
CLRF
MOVLW
MOVWF
10.2
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the RC2/CCP1 pin is:
• Driven High
• Driven Low
• Remains Unchanged
The action on the pin is based on the value of control
bits CCP1M3:CCP1M0 (CCP1CON<3:0>). At the
same time, a compare interrupt is also generated.
FIGURE 10-3: COMPARE MODE
10.2.1
The user must configure the RC2/CCP1 pin as an out-
put by clearing the TRISC<2> bit.
RC2/CCP1
Note:
Output Enable
TRISC<2>
CCP1CON
NEW_CAPT_PS ; Load the W reg with
CCP1CON
Compare Mode
CCP PIN CONFIGURATION
Special event trigger will reset Timer1, but not
set interrupt flag bit TMR1IF (PIR1<0>).
Clearing the CCP1CON register will force
the RC2/CCP1 compare output latch to the
default low level. This is not the data latch.
Q
CCP1CON<3:0>
OPERATION BLOCK DIAGRAM
R
Mode Select
S
CAPTURE PRESCALERS
Output
; Turn CCP module off
; the new prescaler
; mode value and CCP ON
; Load CCP1CON with
; this value
Logic
1997 Microchip Technology Inc.
Set CCP1IF
PIR1<2>
match
CCPR1H CCPR1L
TMR1H
Comparator
TMR1L