AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 397

MCU AVR32 64KB FLASH 48TQFP

AT32UC3L064-AUT

Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r

Specifications of AT32UC3L064-AUT

Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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19.6.9
32099F–11/2010
Wake-up Request
Any node in a sleeping LIN cluster may request a wake-up.
In the LIN 2.0 specification, the wakeup request is issued by forcing the bus to the dominant
state from 250 µs to 5 ms. For this, it is necessary to send the character 0xF0 in order to impose
5 successive dominant bits. Whatever the baud rate is, this character respects the specified
timings.
In the LIN 1.3 specification, the wakeup request should be generated with the character 0x80 in
order to impose 8 successive dominant bits.
The user can choose by the WKUPTYP bit in the LIN Mode register (LINMR) either to send a
LIN 2.0 wakeup request (WKUPTYP=0) or to send a LIN 1.3 wakeup request (WKUPTYP=1).
A wake-up request is transmitted by writing the Control Register (CR) with the LINWKUP bit at 1.
Once the transfer is completed, the LINTC flag is asserted in the Status Register (SR). It is
cleared by writing the Control Register (CR) with the RSTSTA bit at 1.
• Baud rate min = 1 kbit/s -> Tbit = 1ms -> 5 Tbits = 5 ms
• Baud rate max = 20 kbit/s -> Tbi t= 50 µs -> 5 Tbits = 250 µs
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