PIC18F2480-I/SO Microchip Technology, PIC18F2480-I/SO Datasheet - Page 80

• Manufacturer Part Number: PIC18F2480-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2480-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2480/2580/4480/4580
TABLE 5-2:
DS39637C-page 78
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
HLVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
ECCPR1H
ECCPR1L
ECCP1CON
BAUDCON
ECCP1DEL
ECCP1AS
CVRCON
CMCON
TMR3H
TMR3L
T3CON
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
(9)
(9)
(9)
(9)
individual unimplemented bits should be interpreted as ‘—’.
disabled, these bits read as ‘0’.
(9)
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
These registers and/or bits are not implemented on PIC18F2X80 devices and are read as ‘0’. Reset values are shown for PIC18F4X80 devices;
The PLLEN bit is only available in specific oscillator configuration; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in INTOSC
Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes. When
CAN bits have multiple functions depending on the selected mode of the CAN module.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
These registers are available on PIC18F4X80 devices only.
(9)
(9)
Indirect Data Memory Address Pointer 2 Low Byte
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP Receive Buffer/Transmit Register
MSSP Address Register in I
A/D Result Register High Byte
A/D Result Register Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Enhanced Capture/Compare/PWM Register 1 High Byte
Enhanced Capture/Compare/PWM Register 1 Low Byte
Timer3 Register High Byte
Timer3 Register Low Byte
EPWM1M1
VDIRMAG
ECCPASE
TMR0ON
ABDOVF
PRSEN
CVREN
C2OUT
IDLEN
WCOL
GCEN
ADFM
RD16
RD16
IPEN
Bit 7
SMP
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F2480/2580/4480/4580) (CONTINUED)
T3ECCP1
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1
EPWM1M0
ECCPAS2
ACKSTAT
PDC6
CVROE
T1RUN
SSPOV
C1OUT
T08BIT
RCIDL
IRCF2
Bit 6
CKE
—
—
—
—
—
—
—
—
(3)
(2)
(9)
2
C Slave Mode. MSSP Baud Rate Reload Register in I
ECCPAS1
T1CKPS1
T3CKPS1
EDC1B1
PDC5
ACKDT
SSPEN
VCFG1
ACQT2
DC1B1
IRCF1
IRVST
CVRR
C2INV
CHS3
T0CS
Bit 5
D/A
—
—
—
—
—
(3)
ECCPAS0
T1CKPS0
T3CKPS0
HLVDEN
EDC1B0
PDC4
ACKEN
CVRSS
VCFG0
ACQT1
DC1B0
IRCF0
C1INV
CHS2
SCKP
T0SE
Bit 4
CKP
—
—
RI
N
P
Preliminary
(3)
Indirect Data Memory Address Pointer 2 High
T2OUTPS0
T1OSCEN
ECCP1M3
T3CCP1
CCP1M3
PSSAC1
HLVDL3
PDC3
SSPM3
PCFG3
ACQT0
BRG16
RCEN
OSTS
CHS1
CVR3
Bit 3
PSA
CIS
OV
TO
—
S
(3)
(9)
ECCP1M2
TMR2ON
CCP1M2
T1SYNC
PSSAC0
T3SYNC
HLVDL2
PDC2
SSPM2
PCFG2
ADCS2
T0PS2
CHS0
CVR2
IOFS
Bit 2
CM2
R/W
PEN
PD
—
—
Z
(3)
2
C Master Mode.
GO/DONE
PSSBD1
ECCP1M1
T2CKPS1
TMR1CS
CCP1M1
TMR3CS
HLVDL1
PDC1
SSPM1
PCFG1
ADCS1
T0PS1
RSEN
CVR1
SCS1
WUE
Bit 1
POR
CM1
DC
UA
—
(3)
(3)
© 2007 Microchip Technology Inc.
PSSBD0
ECCP1M0
SWDTEN
T2CKPS0
TMR1ON
TMR3ON
CCP1M0
HLVDL0
PDC0
ABDEN
SSPM0
PCFG0
ADCS0
T0PS0
ADON
SCS0
CVR0
BOR
Bit 0
SEN
CM0
BF
C
(3)
(3)
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0000 q000
0-00 0101
0q-1 11q0
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
--00 0qqq
0-00 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
0000 0000
01-0 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
POR, BOR
--- ---0
Value on
Details on
50, 149
50, 149
50, 149
50, 267
50, 353
50, 127
50, 155
50, 155
50, 151
50, 158
50, 155
50, 157
50, 195
50, 195
50, 197
50, 198
50, 199
50, 256
50, 256
50, 247
50, 248
51, 249
51, 168
51, 168
51, 163
51, 167
51, 167
51, 168
51, 230
51, 182
51, 183
51, 263
51, 257
51, 161
51, 161
51, 161
50, 90
50, 90
50, 88
30, 50
Page: