AT89C51RE2-SLRUM Atmel, AT89C51RE2-SLRUM Datasheet - Page 161

MCU 8051 128K FLASH 44-PLCC

AT89C51RE2-SLRUM

Manufacturer Part Number
AT89C51RE2-SLRUM
Description
MCU 8051 128K FLASH 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RE2-SLRUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89OCD-01
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51RE2-SLRUM
Manufacturer:
Atmel
Quantity:
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Part Number:
AT89C51RE2-SLRUM
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Quantity:
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Power Monitor
Description
7663E–8051–10/08
The POR/PFD function monitors the internal power-supply of the CPU core memories and the
peripherals, and if needed, suspends their activity when the internal power supply falls below a
safety threshold. This is achieved by applying an internal reset to them.
By generating the Reset the Power Monitor insures a correct start up when AT89C51RE2 is
powered up.
In order to startup and maintain the microcontroller in correct operating mode, V
bilized in the V
compatible with logic level VIH/VIL.
These parameters are controlled during the three phases: power-up, normal operation and
power going down. See Figure 66.
Figure 66. Power Monitor Block Diagram
Note:
The Voltage regulator generates a regulated internal supply for the CPU core the memories and
the peripherals. Spikes on the external Vcc are smoothed by the voltage regulator.
RST pin
1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock period delay
XTAL1
will extend the reset coming from the Power Fail Detect. If the power falls below the Power Fail
Detect threshold level, the Reset will be applied immediately.
CC
PCA
Watchdog
operating range and the oscillator has to be stabilized with a nominal amplitude
Voltage Regulator
Power Fail Detect
Power On Reset
(1)
Hardware
Watchdog
VCC
Regulated
Supply
Internal Reset
Peripherals
CPU core
Memories
AT89C51RE2
CC
has to be sta-
161

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