W78E052DDG Nuvoton Technology Corporation of America, W78E052DDG Datasheet - Page 51

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W78E052DDG

Manufacturer Part Number
W78E052DDG
Description
IC MCU 8-BIT 8K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet

Specifications of W78E052DDG

Core Processor
8052
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
36
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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0
enabled an interrupt will occur. The selection of the time-base in the timer mode is similar to that in
Mode 0. The gate function operates similarly to that in Mode 0.
14.2.3 Mode 2
In Mode 2, the timer/counter is in the Auto Reload Mode. In this mode, TLx acts as an 8-bit count reg-
ister, while THx holds the reload value. When the TLx register overflows from FFh to 00h, the TFx bit
in TCON is set and TLx is reloaded with the contents of THx, and the counting process continues from
here. The reload operation leaves the contents of the THx register unchanged. Counting is enabled by
the TRx bit and proper setting of GATE and
allows counting of clock/12 or pulses on pin Tn.
14.2.4 Mode 3
Mode 3 has different operating methods for the two timer/counters. For timer/counter 1, mode 3 simply
freezes the counter. Timer/Counter 0, however, configures TL0 and TH0 as two separate 8 bit count
registers in this mode. The logic for this mode is shown in the figure. TL0 uses the Timer/Counter 0
(GATE=TMOD.7)
GATE=TMOD.3
(TR1=TCON.6)
TR0=TCON.4
(INT1=P3.3)
INT0=P3.2
(T1=P3.5)
T0=P3.4
Fosc
1/12
Figure 14- 1 Timer/Counters 0 & 1 in Mode 0,1
Figure 14- 2 Timer/Counter 0 & 1 in Mode 2
W78E054D/W78E052D/W78E051D Data Sheet
0
1
(C/T=TMOD.6)
INTx
C/T=TMOD.2
- 51 -
pins. As in the other two modes 0 and 1 mode 2
0
Publication Release Date: Dec 29, 2009
(TL1)
TL0
4
(M1, M0=TMOD.5, TMOD.4)
M1, M0=TMOD.1, TMOD.0
7
00
01
TFx
(TF1)
TF0
0
(TH1)
TH0
Revision A09
Interrupt
7

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