W78E052DDG Nuvoton Technology Corporation of America, W78E052DDG Datasheet - Page 52

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W78E052DDG

Manufacturer Part Number
W78E052DDG
Description
IC MCU 8-BIT 8K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet

Specifications of W78E052DDG

Core Processor
8052
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
36
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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0
control bits
1-to-0 transitions on pin T0 as determined by C/T (TMOD.2). TH0 is forced as a clock cycle counter
(clock/12) and takes over the use of TR1 and TF1 from Timer/Counter 1. Mode 3 is used in cases
where an extra 8 bit timer is needed. With Timer 0 in Mode 3, Timer 1 can still be used in Modes 0, 1
and 2, but its flexibility is somewhat limited. While its basic functionality is maintained, it no longer has
control over its overflow flag TF1 and the enable bit TR1. Timer 1 can still be used as a timer/counter
and retains the use of GATE and INT1 pin. In this condition it can be turned on and off by switching it
out of and into its own Mode 3. It can also be used as a baud rate generator for the serial port.
14.3 Timer/Counter 2
Timer/Counter 2 is a 16 bit up/down counter which is configured by the T2MOD(bit 0) register and
controlled by the T2CON register. Timer/Counter 2 is equipped with a capture/reload capability. As
with the Timer 0 and Timer 1 counters, there exists considerable flexibility in selecting and controlling
the clock, and in defining the operating mode. The clock source for Timer/Counter 2 may be selected
for either the external T2 pin (C/T2 = 1) or the crystal oscillator, which is divided by 12 (C/T2 = 0). The
clock is then enabled when TR2 is a 1, and disabled when TR2 is a 0.
14.3.1 Capture Mode
The capture mode is enabled by setting the CP RL
mode, Timer/Counter 2 serves as a 16 bit up counter. When the counter rolls over from 0FFFFh to
0000h, the TF2 bit is set, which will generate an interrupt request. If the EXEN2 bit is set, then a nega-
tive transition of T2EX pin will cause the value in the TL2 and TH2 register to be captured by the
RCAP2L and RCAP2H registers. This action also causes the EXF2 bit in T2CON to be set, which will
also generate an interrupt.
C/ , GATE, TR0, INT0 and TF0. The TL0 can be used to count clock cycles (clock/12) or
T
Figure 14- 3 Timer/Counter Mode 3
(RCLK,TCLK,
W78E054D/W78E052D/W78E051D Data Sheet
/
- 52 -
CP/
2 bit in the T2CON register to a 1. In the capture
RL2
)= (0,0,1)

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