Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 25

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Z8F082AHH020SG2156

Manufacturer Part Number
Z8F082AHH020SG2156
Description
IC ENCORE XP MCU FLASH 8K
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F082AHH020SG2156

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q5278375
UM012811-0904
Linear Addressable
Register File
4096B
Figure 3. Register File Organization
Linear Addressing of the Register File
Using 12-bit linear addressing, the eZ8 CPU can directly access any 8-bit registers or 16-
bit register pairs within the 4096B Register File. The instructions that support 12-bit
addressing allow direct register access to most registers without requiring a change to the
value of the Register Pointer (RP). To accommodate the increase in the register address
space relative to the Z8
added to allow easier register access across page boundaries.
Page Mode Addressing of the Register File
In Page mode, the Register File is divided into sixteen 256-Byte register Pages. The cur-
rent page is determined by the Page Pointer value, RP[3:0]. Registers can be accessed by
Direct, Indirect, or Indexed Addressing using 8-bit addresses. The full 12-bit address is
given by {RP[3:0], Address[7:0]}. All 256 registers on the current page can be referenced
FFFH
000H
256B Pages
16
®
E
D
C
B
A
F
9
8
7
6
5
4
3
2
1
0
architecture, new Extended Addressing instructions have been
16B Working Register
Groups Per Page
16
E
D
C
B
A
F
9
8
7
6
5
4
3
2
1
0
Working Registers
Per Group
16
D
C
F
E
B
A
9
8
7
6
5
4
3
2
1
0
Address Space
User Manual
eZ8 CPU
15

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