Z8F0822PJ020EG Zilog, Z8F0822PJ020EG Datasheet - Page 91

IC ENCORE MCU FLASH 8K 28DIP

Z8F0822PJ020EG

Manufacturer Part Number
Z8F0822PJ020EG
Description
IC ENCORE MCU FLASH 8K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0822PJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z8F082xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4207
Z8F0822PJ020EG
Table 39. Timer 0–1 High Byte Register (TxH)
Table 40. Timer 0–1 Low Byte Register (TxL)
Timer Control Register Definitions
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Timer Output Signal Operation
Timer 0–1 High and Low Byte Registers
7
7
Register is read, the contents of the Timer Low Byte Register are placed in a holding
register. A subsequent read from the Timer Low Byte Register returns the value in the
holding register. This operation allows accurate reads of the full 16-bit timer count value
while enabled. When the timers are not enabled, a read from the Timer Low Byte Register
returns the actual value in the counter.
Timer Output is a GPIO port pin alternate function. Generally, the Timer Output is toggled
every time the counter is reloaded.
The Timer 0–1 High and Low Byte (TxH and TxL) Registers
current 16-bit timer count value. When the timer is enabled, a read from TxH causes the
value in TxL to be stored in a temporary holding register. A read from TMRL always
returns this temporary register when the timers are enabled. When the timer is disabled,
reads from the TMRL reads the register directly.
Writing to the Timer High and Low Byte Registers while the timer is enabled is not
recommended. There are no temporary holding registers available for write operations,
so simultaneous 16-bit writes are not possible. If either the Timer High or Low Byte
Registers are written during counting, the 8-bit written value is placed in the counter (High
or Low Byte) at the next clock edge. The counter continues counting from the new value.
6
6
5
5
4
4
0
F00H, F08H
F01H, F09H
R/W
R/W
TH
TL
0
3
3
2
2
Z8 Encore! XP
(Table
Product Specification
1
1
39) contain the
®
F0822 Series
0
0
1
Timers
78

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