MC9S08QG8CDNER Freescale Semiconductor, MC9S08QG8CDNER Datasheet - Page 188

• Manufacturer Part Number: MC9S08QG8CDNER
• Description: IC MCU 8K FLASH 8-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QG8CDNER

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• For Use With: DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: MC9S08QG8CDNERTR

Modulo Timer (S08MTIMV1)
13.3.1
MTIM
reset the counter, and stop the counter.
186
TRST
TSTP
Field
TOIE
TOF
3:0
SC contains the overflow status flag and control bits which are used to configure the interrupt enable,
7
6
5
4
Reset:
W
R
MTIM Overflow Flag — This read-only bit is set when the MTIM counter register overflows to $00 after reaching
the value in the MTIM modulo register. Clear TOF by reading the MTIMSC register while TOF is set, then writing
a 0 to TOF. TOF is also cleared when TRST is written to a 1 or when any value is written to the MTIMMOD register.
0 MTIM counter has not reached the overflow value in the MTIM modulo register.
1 MTIM counter has reached the overflow value in the MTIM modulo register.
MTIM Overflow Interrupt Enable — This read/write bit enables MTIM overflow interrupts. If TOIE is set, then an
interrupt is generated when TOF = 1. Reset clears TOIE. Do not set TOIE if TOF = 1. Clear TOF first, then set TOIE.
0 TOF interrupts are disabled. Use software polling.
1 TOF interrupts are enabled.
MTIM Counter Reset — When a 1 is written to this write-only bit, the MTIM counter register resets to $00 and TOF
is cleared. Reading this bit always returns 0.
0 No effect. MTIM counter remains at current state.
1 MTIM counter is reset to $00.
MTIM Counter Stop — When set, this read/write bit stops the MTIM counter at its current value. Counting resumes
from the current value when TSTP is cleared. Reset sets TSTP to prevent the MTIM from counting.
0 MTIM counter is active.
1 MTIM counter is stopped.
Unused register bits, always read 0.
MTIM Status and Control Register (MTIMSC)
TOF
7
0
Table 13-2. MTIM Status and Control Register Field Descriptions
TOIE
Figure 13-4. MTIM Status and Control Register
0
6
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
TRST
0
0
5
TSTP
1
4
Description
0
0
3
0
0
2
Freescale Semiconductor
0
0
1
0
0
0