C8051F305-GMR Silicon Laboratories Inc, C8051F305-GMR Datasheet - Page 109

• Manufacturer Part Number: C8051F305-GMR
• Description: IC 8051 MCU 2K FLASH 11QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F305-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 8
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• For Use With: 336-1444 - ADAPTER PROGRAM TOOLSTICK F300
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Bits7–0: P0.[7:0]
Bits7–0: Input Configuration Bits for P0.7-P0.0 (respectively)
P0.7
R/W
R/W
Bit7
Bit7
Write - Output appears on I/O pins per XBR0, XBR1, and XBR2 Registers
0: Logic Low Output.
1: Logic High Output (open-drain if corresponding P0MDOUT.n bit = 0)
Read - Always reads ‘1’ if selected as analog input in register P0MDIN. Directly reads Port
pin when configured as digital input.
0: P0.n pin is logic low.
1: P0.n pin is logic high.
Port pins configured as analog inputs have their weak pull-up, digital driver, and digital
receiver disabled.
0: Corresponding P0.n pin is configured as an analog input.
1: Corresponding P0.n pin is configured as a digital input.
P0.6
R/W
R/W
Bit6
Bit6
SFR Definition 12.5. P0MDIN: Port0 Input Mode
P0.5
SFR Definition 12.4. P0: Port0 Register
R/W
R/W
Bit5
Bit5
P0.4
R/W
R/W
Bit4
Bit4
Rev. 2.9
P0.3
R/W
R/W
Bit3
Bit3
P0.2
R/W
Bit2
R/W
Bit2
C8051F300/1/2/3/4/5
P0.1
R/W
Bit1
R/W
Bit1
(bit addressable)
P0.0
R/W
Bit0
R/W
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0x80
0xF1
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