MC9S08JM8CLD Freescale Semiconductor, MC9S08JM8CLD Datasheet - Page 351

MCU 8BIT 8K FLASH 44-LQFP

MC9S08JM8CLD

Manufacturer Part Number
MC9S08JM8CLD
Description
MCU 8BIT 8K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM8CLD

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
33
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08JM8CLD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
The average chip-junction temperature (T
where:
T
θ
P
P
P
For most applications, P
(if P
Solving
where K is a constant pertaining to the particular part. K can be determined from
measuring P
obtained by solving
A.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Freescale Semiconductor
JA
A
D
int
I/O
= Ambient temperature, °C
= P
= Package thermal resistance, junction-to-ambient, °C/W
= I
I/O
= Power dissipation on input and output pins — user determined
int
DD
is neglected) is:
Human Body
Latch-up
Equation A-1
+ P
ESD Protection and Latch-up Immunity
× V
Model
D
I/O
DD
(at equilibrium) for a known T
, Watts — chip internal power
Equation A-1
and
Series resistance
Storage capacitance
Number of pulse per pin
Minimum input voltage limit
Maximum input voltage limit
I/O
Equation A-2
<< P
Table A-4. ESD and Latch-up Test Conditions
K = P
int
and
and can be neglected. An approximate relationship between P
MC9S08JM16 Series Data Sheet, Rev. 2
D
P
Equation A-2
T
× (T
D
Description
J
for K gives:
= K ÷ (T
= T
J
A
) in °C can be obtained from:
+ 273°C) + θ
A
A
+ (P
. Using this value of K, the values of T
J
D
+ 273°C)
× θ
iteratively for any value of T
JA
JA
)
× (P
D
)
2
Symbol
R1
C
Appendix A Electrical Characteristics
Equation A-3
A
Value
1500
–2.5
100
.
7.5
3
J
and P
D
Unit
pF
Ω
V
V
can be
by
D
Eqn. A-1
Eqn. A-2
Eqn. A-3
and T
351
J

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