C8051F523A-IM Silicon Laboratories Inc, C8051F523A-IM Datasheet - Page 142

IC 8051 MCU 4K FLASH 10DFN

C8051F523A-IM

Manufacturer Part Number
C8051F523A-IM
Description
IC 8051 MCU 4K FLASH 10DFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F52xr
Datasheets

Specifications of C8051F523A-IM

Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
10-DFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
6
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1488 - KIT DEV C8051F53XA, C8051F52XA770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1455 - ADAPTER PROGRAM TOOLSTICK F520
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1491-5
C8051F52x/F52xA/F53x/F53xA
14.3. System Clock Selection
The internal oscillator requires little start-up time and may be selected as the system clock immediately fol-
lowing the OSCICN write that enables the internal oscillator. External crystals and ceramic resonators typ-
ically require a start-up time before they are settled and ready for use. The Crystal Valid Flag (XTLVLD in
register OSCXCN) is set to 1 by hardware when the external oscillator is settled. To avoid reading a false
XTLVLD in crystal mode, the software should delay at least 1 ms between enabling the external
oscillator and checking XTLVLD. RC and C modes typically require no startup time.
The CLKSL bit in register CLKSEL selects which oscillator source is used as the system clock. CLKSL
must be set to 1 for the system clock to run from the external oscillator; however the external oscillator may
still clock certain peripherals (timers, PCA) when another oscillator is selected as the system clock. The
system clock may be switched on-the-fly between the internal oscillator and external oscillator, as long as
the selected clock source is enabled and has settled.
SFR Definition 14.5. CLKSEL: Clock Select
142
Bits7–6: Unused. Read = 00b; Write = don’t care.
Bits5–4: Reserved. Read = 00b; Must write 00b.
Bit3:
Bits2–1: Reserved. Read = 00b; Must write 00b.
Bit0:
Bit7
R
-
Unused. Read = 0b; Write = don’t care.
CLKSL: System Clock Select
0: Internal Oscillator (as determined by the IFCN bits in register OSCICN).
1: External Oscillator.
Bit6
R
-
Reserved Reserved
R/W
Bit5
R/W
Bit4
Rev. 1.3
Bit3
R
-
Reserved Reserved
R/W
Bit2
R/W
Bit1
SFR Address:
CLKSL
R/W
Bit0
00000000
Reset Value
0xA9

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