C8051F523A-IM Silicon Laboratories Inc, C8051F523A-IM Datasheet - Page 39

IC 8051 MCU 4K FLASH 10DFN

C8051F523A-IM

Manufacturer Part Number
C8051F523A-IM
Description
IC 8051 MCU 4K FLASH 10DFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F52xr
Datasheets

Specifications of C8051F523A-IM

Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
10-DFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
6
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1488 - KIT DEV C8051F53XA, C8051F52XA770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1455 - ADAPTER PROGRAM TOOLSTICK F520
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1491-5
Table 3.3. DFN-10 Landing Diagram Dimensions
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter
7. A 4x1 array of 1.60 x 0.45 mm openings on 0.65 mm pitch should be used for
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
between the solder mask and the metal pad is to be 60 µm minimum, all the
way around the pad.
should be used to assure good solder paste release.
pads.
the center ground pad.
specification for Small Body Components.
Dimension
C1
X1
X2
Y1
Y2
E
Figure 3.2. DFN-10 Landing Diagram
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
2.90
0.20
1.70
0.70
2.45
Min
0.50 BSC.
Max
3.00
0.30
1.80
0.80
2.55
39

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