MC908QB4CDWE Freescale Semiconductor, MC908QB4CDWE Datasheet - Page 194

• Manufacturer Part Number: MC908QB4CDWE
• Description: IC MCU 8BIT 4K FLASH 16-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QB4CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Processor Series: HC08QB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Controller Family/series: HC08
• No. Of I/o's: 14
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Development Support
17.2.2 Break Module Registers
These registers control and monitor operation of the break module:
17.2.2.1 Break Status and Control Register
The break status and control register (BRKSCR) contains break module enable and status bits.
BRKE — Break Enable Bit
BRKA — Break Active Bit
17.2.2.2 Break Address Registers
The break address registers (BRKH and BRKL) contain the high and low bytes of the desired breakpoint
address. Reset clears the break address registers.
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This read/write bit enables breaks on break address register matches. Clear BRKE by writing a 0 to
bit 7. Reset clears the BRKE bit.
This read/write status and control bit is set when a break address match occurs. Writing a 1 to BRKA
generates a break interrupt. Clear BRKA by writing a 0 to it before exiting the break routine. Reset
clears the BRKA bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled
1 = Break address match
0 = No break address match
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
Break status register (BSR)
Break flag control register (BFCR)
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 17-3. Break Status and Control Register (BRKSCR)
BRKE
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
Figure 17-4. Break Address Register High (BRKH)
Figure 17-5. Break Address Register Low (BRKL)
= Unimplemented
BRKA
Bit 14
Bit 6
6
0
6
0
6
0
MC68HC908QB8 Data Sheet, Rev. 3
Bit 13
Bit 5
5
0
0
5
0
5
0
Bit 12
Bit 4
0
0
0
4
0
4
4
Bit 11
Bit 3
3
0
0
3
0
3
0
Bit 10
Bit 2
2
0
0
2
0
2
0
Bit 9
Bit 1
1
0
0
1
0
1
0
Freescale Semiconductor
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
0
0