MC908AP32CFBER Freescale Semiconductor, MC908AP32CFBER Datasheet - Page 99

• Manufacturer Part Number: MC908AP32CFBER
• Description: IC MCU 32K FLASH 8MHZ 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32CFBER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.2 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, CGMOUT, as shown in
come from either an external oscillator or from the on-chip PLL. (See
(CGM).)
7.2.1 Bus Timing
In user mode, the internal bus frequency is either the oscillator output (CGMXCLK) divided by four or the
divided PLL output (CGMPCLK) divided by four.
Freescale Semiconductor
STOP MODE CLOCK
$FE04
$FE05
$FE06
ENABLE SIGNALS
FROM CONFIG2
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Status Register 3
OSC2
OSC1
PHASE-LOCKED LOOP (PLL)
OSCILLATOR (OSC) MODULE
(INT1)
(INT2)
(INT3)
CGMRCLK
Reset:
Reset:
Read:
Write:
Read:
Write:
Reset:
Read:
Write:
Figure 7-2. SIM I/O Register Summary
MC68HC908AP Family Data Sheet, Rev. 4
Figure 7-3. CGM Clock Signals
IF14
IF6
R
R
R
0
0
0
0
= Unimplemented
IF13
IF21
IF5
R
R
R
0
0
0
CGMOUT
SIMDIV2
OSCCLK
CGMXCLK
ICLK
CGMVCLK
IF12
IF20
IF4
R
R
R
0
0
0
SYSTEM INTEGRATION MODULE
IF11
IF19
IF3
R
R
R
0
0
0
SIM COUNTER
÷ 2
TO PWM
TO TBM
TO TIM, ADC
Chapter 6 Clock Generator Module
SIM Bus Clock Control and Generation
IF10
IF18
IF2
R
R
R
0
0
0
GENERATORS
BUS CLOCK
Figure
USER MODE
MONITOR MODE
IF17
IF1
IF9
R
R
R
0
0
0
7-3. This clock can
IF16
IF8
R
R
R
0
0
0
0
SIMOSCEN
PTB0
IT12
TO REST
OF MCU
IT23
TO REST
OF MCU
IF15
IF7
R
R
R
0
0
0
0
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