R5F21294SNSP#U0 Renesas Electronics America, R5F21294SNSP#U0 Datasheet - Page 198

MCU 3/5V 16K+2K 20PIN-SSOP

R5F21294SNSP#U0

Manufacturer Part Number
R5F21294SNSP#U0
Description
MCU 3/5V 16K+2K 20PIN-SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/29r
Datasheet

Specifications of R5F21294SNSP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21294SNSP#U0R5F21294SNSP#UO
Manufacturer:
RENESAS
Quantity:
15 449
R8C/28 Group, R8C/29 Group
Rev.2.10
REJ09B0279-0210
Figure 14.30
Timer RC Status Register
NOTES:
b7 b6 b5 b4
NOTE:
Bit Symbol
1.
2.
1. The w riting results are as follow s:
IMFA
IMFB
IMFC
IMFD
OVF
Edge selected by bits IOj1 to IOj0 (j = A, B, C, or D).
Includes the condition that bits BFC and BFD are set to 1 (buffer registers of registers TRCGRA
and TRCGRB).
• This bit is set to 0 w hen the read result is 1 and 0 is w ritten to the same bit.
• This bit remains unchanged even if the read result is 0 and 0 is w ritten to the same bit. (This bit remains 1
• This bit remains unchanged if 1 is w ritten to it.
Sep 26, 2008
even if it is set to 1 from 0 after reading, and w riting 0.)
b3 b2
TRCIOA pin input edge
TRCIOB pin input edge
TRCIOC pin input edge
TRCIOD pin input edge
When the TRC register overflow s.
TRCSR Register
b1 b0
Input capture Function
Bit Symbol
(b6-b4)
Symbol
TRCSR
IMFA
IMFB
IMFC
IMFD
OVF
Page 179 of 441
Timer Mode
Input capture / compare match flag
A
Input capture / compare match flag
B
Input capture / compare match flag
C
Input capture / compare match flag
D
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
Overflow flag
(1)
(1)
(1)
(1)
When the values of the registers TRC and TRCGRA match.
When the values of the registers TRC and TRCGRB match.
When the values of the registers TRC and TRCGRC
match.
When the values of the registers TRC and TRCGRD
match.
Output Compare
Address
Bit Name
0123h
Function
(2)
(2)
PWM Mode
[Source for setting this bit to 0]
Write 0 after read.
[Source for setting this bit to 1]
Refer to the table below .
[Source for setting this bit to 0]
Write 0 after read.
[Source for setting this bit to 1]
Refer to the table below .
After Reset
01110000b
Function
PWM2 Mode
(1)
(1)
14. Timers
RW
RW
RW
RW
RW
RW

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