MC56F8322VFAE Freescale Semiconductor, MC56F8322VFAE Datasheet - Page 33

IC DSP 16BIT 60MHZ 48-LQFP

MC56F8322VFAE

Manufacturer Part Number
MC56F8322VFAE
Description
IC DSP 16BIT 60MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8322VFAE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8323EVME - BOARD EVALUATION MC56F8323
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
MC56F8322VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8322VFAE
Manufacturer:
FREESCALE
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20 000
Part Number:
MC56F8322VFAER2
Manufacturer:
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Note: Program RAM is NOT available on the 56F8122 device.
4.3 Interrupt Vector Table
Table 4-3
table is organized with higher-priority vectors at the top and lower-priority interrupts lower in the table.
As indicated, the priority of an interrupt can be assigned to different levels, allowing some control over
interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For a selected priority
level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA). Please see
Section 5.6.11
In some configurations, the reset address and COP reset address will correspond to vector 0 and 1 of the
interrupt vector table. In these instances, the first two locations in the vector table must contain branch or
JMP instructions. All other entries must contain JSR instructions.
Note: PWM, CAN and Quadrature Decoder are NOT available on the 56F8122 device.
Freescale Semiconductor
Preliminary
core
core
core
core
Peripheral
provides the device’s reset and interrupt priority structure, including on-chip peripherals. The
2
3
4
5
for the reset value of the VBA.
Number
Vector
P: $1F FFFF
P: $03 0000
P: $02 FFFF
P: $02 F800
P: $02 F7FF
P: $02 1000
P: $02 0FFF
P: $02 0000
P: $01 FFFF
P: $00 4000
P: $00 3FFF
P: $00 0000
Begin/End Address
3
3
3
3
Priority
Table 4-3 Interrupt Vector Table Contents
Level
Table 4-2 Program Memory Map at Reset
P:$04
P:$06
P:$08
P:$0A
Vector Base
Address +
56F8322 Technical Data, Rev. 16
RESERVED
On-Chip Program RAM
4KB
RESERVED
Boot Flash
8KB
Cop Reset Address = $02 0002
Boot Location = $02 0000
RESERVED
Internal Program Flash
32KB
Reserved for Reset Overlay
Reserved for COP Reset Overlay
Illegal Instruction
SW Interrupt 3
HW Stack Overflow
Misaligned Long Word Access
Memory Allocation
Interrupt Function
2
1
2
Interrupt Vector Table
33

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