C8051F067-GQ Silicon Laboratories Inc, C8051F067-GQ Datasheet - Page 181

IC 8051 MCU 32K FLASH 64TQFP

C8051F067-GQ

Manufacturer Part Number
C8051F067-GQ
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Datasheets

Specifications of C8051F067-GQ

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F060DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 1 Channel
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1222

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The Flash Access Limit security feature (see Figure 16.3) protects proprietary program code and data from
being read by software running on the C8051F060/1/2/3/4/5/6/7. This feature provides support for OEMs
that wish to program the MCU with proprietary value-added firmware before distribution. The value-added
firmware can be protected while allowing additional code to be programmed in remaining program memory
space later.
The Flash Access Limit (FAL) is a 16-bit address that establishes two logical partitions in the program
memory space. The first is an upper partition consisting of all the program memory locations at or above
the FAL address, and the second is a lower partition consisting of all the program memory locations start-
Flash Read Lock Byte
Bits7-0: Each bit locks a corresponding block of memory.
Flash Write/Erase Lock Byte
Bits7-0: Each bit locks a corresponding block of memory.
Flash Access Limit Register (FLACL)
Read and Write/Erase Security Bits
(Bit 7 is MSB)
Bit
7
6
5
4
3
2
1
0
0: Read operations are locked (disabled) for corresponding block across the JTAG interface.
1: Read operations are unlocked (enabled) for corresponding block across the JTAG inter-
face.
0: Write/Erase operations are locked (disabled) for corresponding block across the JTAG
interface.
1: Write/Erase operations are unlocked (enabled) for corresponding block across the JTAG
interface.
NOTE: When the block containing the security bytes is locked, the security bytes may be
written but not erased.
The Flash Access Limit is defined by the setting of the FLACL register, as described in
Figure 16.3. Firmware running at or above this address is prohibited from using the MOVX
and MOVC instructions to read, write, or erase Flash locations below this address.
Figure 16.2. C8051F066/7 Flash Program Memory Map and Security Bytes
Memory Block
0x6000 - 0x7FFD
0x4000 - 0x5FFF
0x2000 - 0x3FFF
0x0000 - 0x1FFF
N/A
N/A
N/A
N/A
Write/Erase Lock Byte
Read Lock Byte
Memory Space
Program/Data
SFLE = 0
Reserved
Rev. 1.2
C8051F060/1/2/3/4/5/6/7
0xFFFF
0x8000
0x7FFF
0x7FFE
0x7FFD
0x0000
Flash Access Limit
Scratchpad Memory
SFLE = 1
(Data only)
0x007F
0x0000
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