C8051F067-GQ Silicon Laboratories Inc, C8051F067-GQ Datasheet - Page 242

IC 8051 MCU 32K FLASH 64TQFP

C8051F067-GQ

Manufacturer Part Number
C8051F067-GQ
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Datasheets

Specifications of C8051F067-GQ

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F060DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 1 Channel
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1222

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C8051F060/1/2/3/4/5/6/7
Setting the SMBus0 Free Timer Enable bit (FTE, SMB0CN.1) to logic 1 enables the timer in SMB0CR.
When SCL goes high, the timer in SMB0CR counts up. A timer overflow indicates a free bus timeout: if
SMBus0 is waiting to generate a START, it will do so after this timeout. The bus free period should be less
than 50 µs (see Figure 20.9, SMBus0 Clock Rate Register).
When the TOE bit in SMB0CN is set to logic 1, Timer 4 is used to detect SCL low timeouts. If Timer 4 is
enabled (see
Section “24.2. Timer 2, Timer 3, and Timer 4” on page
295), Timer 4 is forced to reload when
SCL is high, and forced to count when SCL is low. With Timer 4 enabled and configured to overflow after
242
Rev. 1.2

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