M38227ECFP Renesas Electronics America, M38227ECFP Datasheet - Page 34

IC 740 MCU EPROM 48K 80QFP

M38227ECFP

Manufacturer Part Number
M38227ECFP
Description
IC 740 MCU EPROM 48K 80QFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M38227ECFP

Core Processor
740
Core Size
8-Bit
Speed
8MHz
Connectivity
SIO, UART/USART
Peripherals
LCD
Number Of I /o
49
Program Memory Size
48KB (48K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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[Transmit Buffer/Receive Buffer Register
(TB/RB)] 0018
The transmit buffer register and the receive buffer register are lo-
cated at the same address. The transmit buffer register is
write-only and the receive buffer register is read-only. If a charac-
ter bit length is 7 bits, the MSB of data stored in the receive buffer
register is “0”.
[Serial I/O Status Register (SIOSTS)] 0019
The read-only serial I/O status register consists of seven flags
(bits 0 to 6) which indicate the operating status of the serial I/O
function and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to “0” when the receive
buffer is read.
If there is an error, it is detected at the same time that data is
transferred from the receive shift register to the receive buffer reg-
ister, and the receive buffer full flag is set. A write to the serial I/O
status register clears all the error flags OE, PE, FE, and SE. Writ-
ing “0” to the serial I/O enable bit (SIOE) also clears all the status
flags, including the error flags.
All bits of the serial I/O status register are initialized to “0” at reset,
but if the transmit enable bit (bit 4) of the serial I/O control register
has been set to “1”, the transmit shift register shift completion flag
(bit 2) and the transmit buffer empty flag (bit 0) become “1”.
[Serial I/O Control Register (SIOCON)] 001A
The serial I/O control register contains eight control bits for the se-
rial I/O function.
[UART Control Register (UARTCON) ]001B
The UART control register consists of four control bits (bits 0 to 3)
which are valid when asynchronous serial I/O is selected and set
the data format of an data transfer. One bit in this register (bit 4) is
always valid and sets the output structure of the P4
[Baud Rate Generator (BRG)] 001C
The baud rate generator determines the baud rate for serial trans-
fer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate genera-
tor.
When setting the transmit enable bit to “1”, the serial I/O transmit
interrupt request bit is automatically set to “1”. When not requiring
the interrupt occurrence synchronized with the transmission
enalbed, take the following sequence.
Set the serial I/O transmit interrupt enable bit to “0” (disabled).
Set the transmit enable bit to “1”.
Set the serial I/O transmit interrupt request bit to “0” after 1 or
Set the serial I/O transmit interrupt enable bit to “1” (enabled).
more instructions have been executed.
Notes on serial I/O
16
16
5
/T
X
D pin.
16
16
16
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3822 Group
31

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