M30840SGP#U5 Renesas Electronics America, M30840SGP#U5 Datasheet - Page 100

IC M32C/84 MCU ROMLESS 100LQFP

M30840SGP#U5

Manufacturer Part Number
M30840SGP#U5
Description
IC M32C/84 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30840SGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30840SGP#U5M30840SGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30840SGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
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8.3 Page Mode Control Function
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The page mode control functin allows the microcimputer to be read data in the external memory, associ-
ated with page mode, at high speeds. If the 21 high-order bits of consecutive addresses accessed by the
microcomputer remains the same, access time to each address following the first access is shortened.
The EWCRi (i=0 to 3) registers determine how many wait states are inserted to access the first address.
The PWCR0 and PWCR1 registers determine how many wait states are inserted to access the consecu-
tive addresses following the first address.
Use the following procedure to enable the page mode control.
When using the page mode control, access data in all external space only with the page mode control.
It is not allowed to combine the page mode control access and normal access to data in each external
space.
Set the PM05 and PM04 bits in the PM0 register to "00
control function and multiplexed bus cannot be used at the same time.
Figure 8.13 shows the PWCR0 register. Figure 8.14 shows the PWCR1 register. Figure 8.15 shows an
example of the external bus operation with the page mode control function.
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The page mode control function can be used in the ROMless version only.
(1) Set the EWCRi04 to EWCRi00 (i=0 to 3) bits in the EWCRi register
(2) Set the PWCRj02 to PWCRj00 (j=0, 1) bits and the PWCRj06 to PWCRj04 bits in the PWCRj register
(3) Set the PWCRj03 and PWCRj07 bits in the PWCRj register to "1" (page mode control enabled)
NOTE
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Page 77
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" (multiplexed bus not used). The page mode
8. Bus

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