M30840SGP#U5 Renesas Electronics America, M30840SGP#U5 Datasheet - Page 258

• Manufacturer Part Number: M30840SGP#U5
• Description: IC M32C/84 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30840SGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

R
R
M
e
E
3
. v
J
2
Figure 17.27 Clock-Divided Synchronous Function
Table 17.29 Clock-Divided Synchronous Function Select
0
i=0 to 4
C
1
9
SCLKDIV Bit in
UiSMR Register
0 .
8 /
B
To generate the internal clock synchronized with the external clock, set the SU1HIM bit in the UiSMR2
register (i=0 to 4) and the SCLKDIV bit in the UiSMR register to values shown in Table 17.29. Then apply
a trigger signal to the CTSi pin. Either the same clock cycle as the external clock or external clock divided
by two can be selected as the transfer clock. The SCLKSTPB bit in the UiC1 register controls the transfer
clock. Set the SCLKSTPB bit accordingly, to start or stop the transfer clock during an external clock
operation. Figure 17.27 shows an example of the clock-divided synchronous function.
0
1
4
0
A
B
3
G
J
6
0
0
1
u
Trigger Signal
from the CTSi Pin
o r
External Clock
from the CLKi Pin
0 -
. l
u
0
1
TxDi
TxDi
Transfer Clock
Transfer Clock
, 7
0
p
1
(
2
M
i=0 to 4
A, B : See Table 17.29.
0
0
3
5
2
C
UiSMR2 Register
8 /
Page 235
SU1HIM Bit in
, 4
________
0 or 1
M
0
1
3
2
C
f o
8 /
4
4
1
) T
9
5
1
Not synchronized
Same division as the external clock
Same division as the external clock
divided by 2
2
1
2
Clock-Divided Synchronous Function
3
3
4
2
4
5
5
6
3
6
7
7
8
4
8
The SCLKSTPB bit in the UiC1 register
stops the clock
5
17. Serial I/O (Special Function)
6
-
A in Figure 17.27
B in Figure 17.27
Example of Waveform
7
8