HD64F3687FPIV Renesas Electronics America, HD64F3687FPIV Datasheet - Page 349

MCU 3/5V 56K I-TEMP PB-FREE 64-L

HD64F3687FPIV

Manufacturer Part Number
HD64F3687FPIV
Description
MCU 3/5V 56K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3687FPIV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3687FPIV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Bit
2
1
Bit Name
AL/OVE
AAS
Initial
Value
0
0
R/W
R/W
R/W
Description
Arbitration Lost Flag/Overrun Error Flag
This flag indicates that arbitration was lost in master
mode with the I
been received while RDRF = 1 with the clocked
synchronous format.
When two or more master devices attempt to seize the
bus at nearly the same time, if the I
detects data differing from the data it sent, it sets AL to 1
to indicate that the bus has been taken by another
master.
[Setting conditions]
[Clearing condition]
Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first frame
following a start condition matches bits SVA6 to SVA0 in
SAR.
[Setting conditions]
[Clearing condition]
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
When the SDA pin outputs high in master mode while
a start condition is detected
When the final bit is received with the clocked
synchronous format while RDRF = 1
When 0 is written in AL/OVE after reading AL/OVE=1
When the slave address is detected in slave receive
mode
When the general call address is detected in slave
receive mode.
When 0 is written in AAS after reading AAS=1
2
C bus format and that the final bit has
Rev.5.00 Nov. 02, 2005 Page 315 of 500
Section 17 I
2
C bus interface
2
C Bus Interface 2 (IIC2)
REJ09B0027-0500

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