M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 232

IC M16C MCU FLASH 100QFP

M30624FGAFP#U3

Manufacturer Part Number
M30624FGAFP#U3
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30624FGAFP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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CPU Rewrite Mode (Flash Memory Version)
Data Protect Function (Block Lock)
Status Register
Each block in Figure 1.25.1 has a nonvolatile lock bit to specify that the block be protected (locked)
against erase/write. The lock bit program command is used to set the lock bit to 0 (locked). The lock bit of
each block can be read out using the read lock bit status command.
Whether block lock is enabled or disabled is determined by the status of the lock bit and how the flash
memory control register 0’s lock bit disable select bit is set.
The status register indicates the operating status of the flash memory and whether an erase or program
operation has terminated normally or in an error. The content of this register can be read out by only
writing the read status register command (70
The status register is cleared by writing the Clear Status Register command (50
After a reset, the status register is set to “80
Each bit in this register is explained below.
Write state machine (WSM) status (SR7)
Erase status (SR5)
(1) When the lock bit disable select bit = “0”, a specified block can be locked or unlocked by the lock bit
(2) When the lock bit disable select bit = “1”, all blocks are nonlocked regardless of the lock bit data, so
After power-on, the write state machine (WSM) status is set to “1”.
The write state machine (WSM) status indicates the operating status of the device, as for output on the
RY/BY pin. This status bit is set to “0” during auto write or auto erase operation and is set to “1” upon
completion of these operations.
The erase status informs the operating status of auto erase operation to the CPU. When an erase
error occurs, it is set to “1”.
The erase status is reset to “0” when cleared.
status (lock bit data). Blocks whose lock bit data = “0” are locked, so they are disabled against
erase/write. On the other hand, the blocks whose lock bit data = “1” are not locked, so they are
enabled for erase/write.
they are enabled for erase/write. In this case, the lock bit data that is “0” (locked) is set to “1”
(nonlocked) after erasure, so that the lock bit-actuated lock is removed.
____
16
16
.”
). Table 1.26.2 details the status register.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
).
M16C / 62A Group
Mitsubishi microcomputers
229

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