D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 684

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.3.13 Line Status Register (SCLSR)
Initial value:
Notes: 1. Only 0 can be written, to clear the flag.
Rev. 2.00 Feb. 12, 2010 Page 600 of 1330
REJ09B0554-0200
Bit
15 to 1
0
R/W:
Bit:
2. The ORER flag is not affected and retains its previous state when the RE bit in SCSCR
3. The receive data prior to the overrun error is retained in SCFRDR, and the data
—
ORER
Bit Name
is cleared to 0.
received subsequently is lost. Serial reception cannot be continued while the ORER flag
is set to 1.
15
R
0
-
14
-
R
0
13
R
0
-
Initial Value R/W
All 0
0
12
R
0
-
11
R
0
-
R
R/W*
10
R
0
-
1
R
9
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Overrun Error
Indicates that an overrun error occurred during
reception, causing abnormal termination.
0: Reception in progress, or reception has ended
[Clearing conditions]
•
•
1: An overrun error occurred during reception*
[Setting condition]
•
R
8
0
-
normally*
Power-on reset or manual reset
When 0 is written to ORER after reading
ORER = 1
When the next serial reception is completed
while SCFRDR receives 128-byte data
(SCFRDR is full)
R
7
0
-
2
R
6
0
-
R
5
0
-
4
0
R
-
R
3
0
-
2
0
R
-
R
1
0
-
ORER
R/W*
3
0
0
1