SAK-XC2267-96F80L AC Infineon Technologies, SAK-XC2267-96F80L AC Datasheet - Page 60

• Manufacturer Part Number: SAK-XC2267-96F80L AC
• Description: IC MCU 32BIT FLASH 100-LQFP
• Manufacturer: Infineon Technologies
• Series: XC22xxr

Specifications of SAK-XC2267-96F80L AC

• Core Processor: C166SV2
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: DMA, I²S, POR, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 82K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: SP000300101

Target Protocols
Each USIC channel can receive and transmit data frames with a selectable data word
width from 1 to 16 bits in each of the following protocols:
•
•
•
•
•
Note: Depending on the selected functions (such as digital filters, input synchronization
Data Sheet
UART (asynchronous serial channel)
– maximum baud rate:
– data frame length programmable from 1 to 63 bits
– MSB or LSB first
LIN Support (Local Interconnect Network)
– maximum baud rate:
– checksum generation under software control
– baud rate detection possible by built-in capture event of baud rate generator
SSC/SPI/QSPI (synchronous serial channel with or without data buffer)
– maximum baud rate in slave mode:
– maximum baud rate in master mode:
– number of data bits programmable from 1 to 63, more with explicit stop condition
– MSB or LSB first
– optional control of slave select signals
IIC (Inter-IC Bus)
– supports baud rates of 100 kbit/s and 400 kbit/s
IIS (Inter-IC Sound Bus)
– maximum baud rate:
stages, sample point adjustment, etc.), the maximum achievable baud rate can be
limited. Please note that there may be additional delays, such as internal or
external propagation delays and driver delays (e.g. for collision detection in UART
mode, for IIC, etc.).
f
f
f
SYS
SYS
SYS
/ 4
/ 16
/ 2 for transmitter,
f
58
SYS
f
SYS
/ 2, limited by loop delay
f
SYS
for receiver
XC2000 Family Derivatives
Functional Description
XC2267 / XC2264
V2.1, 2008-08