SAF-TC1164-128F80HL AB Infineon Technologies, SAF-TC1164-128F80HL AB Datasheet - Page 65

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SAF-TC1164-128F80HL AB

Manufacturer Part Number
SAF-TC1164-128F80HL AB
Description
IC MCU 32BIT FLASH LQFP176-2
Manufacturer
Infineon Technologies
Series
TC116xr
Datasheet

Specifications of SAF-TC1164-128F80HL AB

Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
76K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 36x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
76.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Preliminary
3.12
The Micro Link Interface is a fast synchronous serial interface that allows data exchange
between microcontrollers of the 32-bit AUDO microcontroller family without intervention
of a CPU or other bus masters.
connected together via their MLI interfaces. The MLI operates in both microcontrollers
as a bus master on the system bus.
Figure 3-8
Features
MLI transmitter and MLI receiver communicate with other off-chip MLI receivers and MLI
transmitters via a 4-line serial I/O bus each. Several I/O lines of these I/O buses are
available outside the MLI module kernel as four-line output or input buses.
Data Sheet
Synchronous serial communication between MLI transmitters and MLI receivers
located on the same or on different microcontroller devices
Automatic data transfer/request transactions between local/remote controller
Fully transparent read/write access supported (= remote programming)
Complete address range of remote controller available
Specific frame protocol to transfer commands, addresses and data
Error control by parity bit
32-bit, 16-bit, and 8-bit data transfers
Programmable baud rates
– MLI transmitter baud rate: max.
– MLI receiver baud rate: max.
Multiple remote (slave) controllers are supported
Peripheral
Memory
Micro Link Serial Bus Interface (MLI0)
A
Typical Micro Link Interface Connection
System Bus
Controller 1
CPU
Peripheral
Figure 3-8
MLI
B
f
MLI
f
MLI
/2 (= 40 Mbit/s @ 80 MHz module clock)
61
shows how two microcontrollers are typically
Peripheral
MLI
C
System Bus
Controller 2
CPU
Functional Description
Peripheral
TC1163/TC1164
Memory
D
MCA06061
V1.0, 2008-04

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