AT90LS2333-4AI Atmel, AT90LS2333-4AI Datasheet - Page 27

IC MCU 2K 4MHZ A/D LV IT 32TQFP

AT90LS2333-4AI

Manufacturer Part Number
AT90LS2333-4AI
Description
IC MCU 2K 4MHZ A/D LV IT 32TQFP
Manufacturer
Atmel
Series
AVR® 90LSr
Datasheet

Specifications of AT90LS2333-4AI

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AT90S/LS2333 and AT90S/LS4433
The value on the INT0 pin is sampled before detecting edges. If edge or toggle interrupt is selected, pulses that last longer
than one clock period will generate an interrupt. Shorter pulses are not guaranteed to generate an interrupt. If low level
interrupt is selected, the low level must be held until the completion of the currently executing instruction to generate an
interrupt
Sleep Modes
To enter the sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruction must be executed. The SM bit
in the MCUCR register selects which sleep mode (Idle or Power Down) will be activated by the SLEEP instruction. If an
enabled interrupt occurs while the MCU is in a sleep mode, the MCU awakes, executes the interrupt routine, and resumes
execution from the instruction following SLEEP. On wake-up from Power Down Mode on pin change, the two instructions
following SLEEP are executed before the pin change interrupt routine. The contents of the register file and I/O memory are
unaltered. If a reset occurs during sleep mode, the MCU wakes up and executes from the Reset vector.
Note that if a level triggered interrupt is used for wake-up from power down, the low level must be held for a time longer
than the reset delay time-out period t
. Otherwise, the device will not wake up.
TOUT
Idle Mode
When the SM bit is cleared (zero), the SLEEP instruction forces the MCU into the Idle Mode stopping the CPU but allowing
Timer/Counters, Watchdog and the interrupt system to continue operating. This enables the MCU to wake up from external
triggered interrupts as well as internal ones like Timer Overflow interrupt and watchdog reset. If wake-up from the Analog
Comparator interrupt is not required, the analog comparator can be powered down by setting the ACD-bit in the Analog
Comparator Control and Status register - ACSR. This will reduce power consumption in Idle Mode.
Power Down Mode
When the SM bit is set (one), the SLEEP instruction forces the MCU into the Power Down Mode. In this mode, the external
oscillator is stopped, while the external interrupts and the Watchdog (if enabled) continue operating. Only an external reset,
a watchdog reset (if enabled), an external level interrupt, or a pin change interrupt can wake up the MCU.
Note that if a level triggered or pin change interrupt is used for wake-up from Power Down Mode, the changed level must
be held for a time to wake up the MCU. This makes the MCU less sensitive to noise. The wake-up period is equal to the
clock-counting part of the reset period (see Table 5). The MCU will wake up from power-down if the input has the required
level for two watchdog oscillator cycles. If the wake up period is shorter than two watchdog oscillator cycles, the MCU will
wake up if the input has the required level for the duration of the wake-up period. If the wake-up condition disappears
before the wake-up period has expired, the MCU will wake up from power down without executing the corresponding
interrupt.
The period of the watchdog oscillator is 2.7µs (nominal) at 3.0V and 25 C. The frequency of the watchdog oscillator is volt-
age dependent as shown in the Electrical Characteristics section.
When waking up from Power Down Mode, there is a delay from the wake-up condition occurs until the wake-up becomes
effective. This allows the clock to restart and become stable after having been stopped. The wake-up period is defined by
the same CKSEL fuses that define the reset time-out period.
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