AT90LS2333-4AI Atmel, AT90LS2333-4AI Datasheet - Page 60

• Manufacturer Part Number: AT90LS2333-4AI
• Description: IC MCU 2K 4MHZ A/D LV IT 32TQFP
• Manufacturer: Atmel
• Series: AVR® 90LSr

Specifications of AT90LS2333-4AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The Port B Input Pins address - PINB - is not a register, and this address enables access to the physical value on each Port
B pin. When reading PORTB, the Port B Data Latch is read, and when reading PINB, the logical values present on the pins
are read.
Port B As General Digital I/O
All 6 pins in Port B have equal functionality when used as digital I/O pins.
PBn, General I/O pin: The DDBn bit in the DDRB register selects the direction of this pin, if DDBn is set (one), PBn is con-
figured as an output pin. If DDBn is cleared (zero), PBn is configured as an input pin. If PORTBn is set (one) when the pin
configured as an input pin, the MOS pull up resistor is activated. To switch the pull up resistor off, the PORTBn has to be
cleared (zero) or the pin has to be configured as an output pin.The port pins are tristated when a reset condition becomes
active, even if the clock is not running.
Table 24. DDBn Effects on Port B Pins
Note:
Alternate Functions Of Port B
The alternate pin configuration is as follows:
•
SCK: Master clock output, slave clock input pin for SPI channel. When the SPI is enabled as a slave, this pin is configured
as an input regardless of the setting of DDB5. When the SPI is enabled as a master, the data direction of this pin is con-
trolled by DDB5. When the pin is forced to be an input, the pull-up can still be controlled by the PORTB5 bit. See the
description of the SPI port for further details.
•
MISO: Master data input, slave data output pin for SPI channel. When the SPI is enabled as a master, this pin is configured
as an input regardless of the setting of DDB4. When the SPI is enabled as a slave, the data direction of this pin is controlled
by DDB4. When the pin is forced to be an input, the pull-up can still be controlled by the PORTB4 bit. See the description of
the SPI port for further details.
•
MOSI: SPI Master data output, slave data input for SPI channel. When the SPI is enabled as a slave, this pin is configured
as an input regardless of the setting of DDB3. When the SPI is enabled as a master, the data direction of this pin is con-
trolled by DDB3. When the pin is forced to be an input, the pull-up can still be controlled by the PORTB3 bit. See the
description of the SPI port for further details.
•
SS: Slave port select input. When the SPI is enabled as a slave, this pin is configured as an input regardless of the setting
of DDB2. As a slave, the SPI is activated when this pin is driven low. When the SPI is enabled as a master, the data direc-
tion of this pin is controlled by DDB2. When the pin is forced to be an input, the pull-up can still be controlled by the
PORTB2 bit. See the description of the SPI port for further details.
•
OC1, Output compare match output: PB1 pin can serve as an external output for the Timer/Counter1 output compare. The
pin has to be configured as an output (DDB1 set (one)) to serve this function. See the timer description on how to enable
this function. The OC1 pin is also the output pin for the PWM mode timer function.
•
ICP, Input Capture Pin: PB0 pin can serve as an external input for the Timer/Counter1 input capture. The pin has to be con-
figured as an input (DDB0 cleared (zero)) to serve this function. See the timer description on how to enable this function.
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SCK - Port B, Bit 5
MISO - Port B, Bit 4
MOSI - Port B, Bit 3
SS - Port B, Bit 2
OC1 - Port B, Bit1
ICP- Port B, Bit0
DDBn
0
0
1
1
n: 5…0, pin number.
AT90S/LS2333 and AT90S/LS4433
PORTBn
0
1
0
1
Output
Output
Input
Input
I/O
Pull Up
Yes
No
No
No
Comment
Tri-state (Hi-Z)
PBn will source current if ext. pulled low.
Push-Pull Zero Output
Push-Pull One Output