PIC16C432-E/P Microchip Technology, PIC16C432-E/P Datasheet - Page 59

• Manufacturer Part Number: PIC16C432-E/P
• Description: IC MCU CMOS 8-BIT 20MHZ 2K 20DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C432-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• For Use With: AC164029 - MODULE SKT PROMATEII 20DIP/SSOPDVA16XP201 - ADAPTER DEVICE FOR MPLAB-ICE
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Data Converters: -

9.8
The Power-down mode is entered by executing a
SLEEP
If enabled, the Watchdog Timer will be cleared but
keeps running, the PD bit in the STATUS register is
cleared, the TO bit is set and the oscillator driver is
turned off. The I/O ports maintain the status they had
before
impedance).
For lowest current consumption in this mode, all I/O
pins should be either at V
circuitry drawing current from the I/O pin, and the com-
parators and V
hi-impedance inputs should be pulled high or low exter-
nally to avoid switching currents caused by floating
inputs. The T0CKI input should also be at V
for lowest current consumption. The contribution from
on-chip pull-ups on PORTB should be considered.
The MCLR pin must be at a logic high level (V
Note:
2002 Microchip Technology Inc.
SLEEP
instruction.
Power-down Mode (SLEEP)
It should be noted that a RESET generated
by a WDT timeout does not drive MCLR
pin low.
REF
was executed (driving high, low, or hi-
should be disabled. I/O pins that are
DD
or V
SS
, with no external
DD
IHMC
or V
).
Preliminary
SS
9.8.1
The device can wake-up from SLEEP through one of
the following events:
1.
2.
3.
4.
The first event will cause a device RESET. The two lat-
ter events are considered a continuation of program
execution. The TO and PD bits in the STATUS register
can be used to determine the cause of device RESET.
PD bit, which is set on power-up is cleared when
SLEEP is invoked. TO bit is cleared if WDT wake-up
occurred.
When the
next instruction (PC + 1) is pre-fetched. For the device
to wake-up through an interrupt event, the correspond-
ing interrupt enable bit must be set (enabled). Wake-up
is regardless of the state of the GIE bit. If the GIE bit is
clear (disabled), the device continues execution at the
instruction after the
set (enabled), the device executes the instruction after
the
rupt address (0004h). In cases where the execution of
the instruction following
user should have an
The WDT is cleared when the device wakes up from
SLEEP, regardless of the source of wake-up.
Note:
SLEEP
External RESET input on MCLR pin.
Watchdog Timer Wake-up (if WDT was
enabled).
Interrupt from RB0/INT pin, RB Port change, or
the Peripheral Interrupt (Comparator).
LIN activity.
SLEEP
If the global interrupts are disabled (GIE is
cleared), but any interrupt source has both
its interrupt enable bit and the correspond-
ing interrupt flag bits set, the device will
immediately wake-up from SLEEP. The
SLEEP instruction is completely executed.
WAKE-UP FROM SLEEP
instruction and then branches to the inter-
instruction is being executed, the
SLEEP
NOP
SLEEP
PIC16C432
after the
instruction. If the GIE bit is
is not desirable, the
SLEEP
DS41140B-page 57
instruction.