ATTINY2313-20SI Atmel, ATTINY2313-20SI Datasheet - Page 17

• Manufacturer Part Number: ATTINY2313-20SI
• Description: IC MCU AVR 2K FLASH 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313-20SI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATTINY2313-24SI; ATTINY2313-24SI

The EEPROM Data
Register – EEDR
The EEPROM Control
Register – EECR
2543L–AVR–08/10
• Bits 6..0 – EEAR6..0: EEPROM Address
The EEPROM Address Register – EEAR specify the EEPROM address in the 128 bytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 127. The ini-
tial value of EEAR is undefined. A proper value must be written before the EEPROM may be
accessed.
• Bits 7..0 – EEDR7..0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the ATtiny2313 and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bits setting defines which programming action that will be
triggered when writing EEPE. It is possible to program data in one atomic operation (erase the
old value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in
set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00
unless the EEPROM is busy programming.
Table 1. EEPROM Mode Bits
• Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set. Writing
EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a constant inter-
rupt when Non-volatile memory is ready for programming.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
EEPM1
0
0
1
1
EEPM0
0
1
0
1
MSB
R/W
R
7
0
7
–
0
Programming
R/W
R
6
0
6
–
0
3.4 ms
1.8 ms
1.8 ms
Time
–
EEPM1
R/W
R/W
5
0
5
X
Operation
Erase and Write in one operation (Atomic Operation)
Erase Only
Write Only
Reserved for future use
EEPM0
R/W
R/W
4
0
4
X
EERIE
R/W
R/W
3
0
3
0
EEMPE
R/W
R/W
2
0
2
0
EEPE
R/W
R/W
1
0
1
X
EERE
LSB
R/W
R/W
Table
0
0
0
0
1. While EEPE is
EEDR
EECR
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