TS80C51RA2-VCA Atmel, TS80C51RA2-VCA Datasheet - Page 12

• Manufacturer Part Number: TS80C51RA2-VCA
• Description: IC MCU 8BIT 256BYTE 40MHZ 40-DIP
• Manufacturer: Atmel
• Series: 80Cr

Specifications of TS80C51RA2-VCA

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40/30MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5.2
5.3
5.3.1
12
TS80C51Rx2 Enhanced Features
X2 Feature
AT/TS8xC51Rx2
Description
In comparison to the original 80C52, the TS8xC51Rx2 implements some new features, which
are
The TS80C51Rx2 core needs only 6 clock periods per machine cycle. This feature called ”X2”
provides the following advantages:
In order to keep the original C51 compatibility, a divider by 2 is inserted between the XTAL1 sig-
nal and the main clock input of the core (phase generator). This divider may be disabled by
software.
The clock for the whole circuit and peripheral is first divided by two before being used by the
CPU core and peripherals. This allows any cyclic ratio to be accepted on XTAL1 input. In X2
mode, as this divider is bypassed, the signals on XTAL1 must have a cyclic ratio between 40 to
60%.
ing edge to avoid glitches when switching from X2 to STD mode.
switching waveforms.
• The X2 option.
• The Dual Data Pointer.
• The extended RAM.
• The Programmable Counter Array (PCA).
• The Watchdog.
• The 4 level interrupt priority system.
• The power-off flag.
• The ONCE mode.
• The ALE disabling.
• Some enhanced features are also located in the UART and the timer 2.
• Divides frequency crystals by 2 (cheaper crystals) while keeping same CPU power.
• Saves power consumption while keeping same CPU power (oscillator power saving).
• Saves power consumption by dividing dynamically operating frequency by 2 in operating and
• Increases CPU power by 2 while keeping same crystal frequency.
:
idle modes.
Figure 5-1
shows the clock generation block diagram. X2 bit is validated on XTAL1÷2 ris-
Figure 5-2
shows the mode
4188F–8051–01/08