TS80C51RA2-VCB Atmel, TS80C51RA2-VCB Datasheet - Page 51

IC MCU 8BIT 256BYTE 40MHZ 44PLCC

TS80C51RA2-VCB

Manufacturer Part Number
TS80C51RA2-VCB
Description
IC MCU 8BIT 256BYTE 40MHZ 44PLCC
Manufacturer
Atmel
Series
80Cr
Datasheets

Specifications of TS80C51RA2-VCB

Core Processor
8051
Core Size
8-Bit
Speed
40/30MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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7. TS83C51RB2/RC2/RD2 ROM
7.1. ROM Structure
The TS83C51RB2/RC2/RD2 ROM memory is divided in three different arrays:
7.2. ROM Lock System
The program Lock system, when programmed, protects the on-chip program against software piracy.
7.2.1. 7.2.1. Encryption Array
Within the ROM array are 64 bytes of encryption array that are initially unprogrammed (all FF’s). Every time a
byte is addressed during program verify, 6 address lines are used to select a byte of the encryption array. This
byte is then exclusive-NOR’ed (XNOR) with the code byte, creating an encrypted verify byte. The algorithm, with
the encryption array in the unprogrammed state, will return the code in its original, unmodified form.
When using the encryption array, one important factor needs to be considered. If a byte has the value FFh, verifying
the byte will produce the encryption byte value. If a large block (>64 bytes) of code is left unprogrammed, a
verification routine will display the content of the encryption array. For this reason all the unused code bytes
should be programmed with random values. This will ensure program protection.
7.2.2. Program Lock Bits
The lock bits when programmed according to Table 28. will provide different level of protection for the on-chip
code and data.
U: unprogrammed
P: programmed
7.2.3. Signature bytes
The TS83C51RB2/RC2/RD2 contains 4 factory programmed signatures bytes. To read these bytes, perform the
process described in section 8.3.
7.2.4. Verify Algorithm
Refer to 8.3.4.
Rev. C - 06 March, 2001
Security
level
the code array: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16/32/64 Kbytes.
the encryption array: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 bytes.
the signature array:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 bytes.
1
2
3
Program Lock Bits
LB1
U
U
P
LB2
U
U
P
LB3
U
U
U
Table 28. Program Lock bits
No program lock features enabled. Code verify will still be encrypted by the encryption
array if programmed. MOVC instruction executed from external program memory returns
non encrypted data.
MOVC instruction executed from external program memory are disabled from fetching
code bytes from internal memory, EA is sampled and latched on reset.
Same as level 1+ Verify disable.
This security level is only available for 51RDX2 devices.
Protection description
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
TS80C51RA2/RD2
51

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