Z8F042AHH020SC00TR Zilog, Z8F042AHH020SC00TR Datasheet - Page 12

• Manufacturer Part Number: Z8F042AHH020SC00TR
• Description: IC ENCORE XP MCU FLASH 4K 20SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F042AHH020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Z8F042AHH020SC00T

Table 5. Z8 Encore! XP
UP006912-0308
Sl
No. Summary
19
20
21
22
23
24
25
LED driver is not 5 V
tolerant.
LED driver has
encoding error for
drive levels.
WDT Frequency is
incorrect.
Potential
electromigration
issues through V
pads.
Switching from PD0
to RESET causes a
reset.
STOP mode does
not automatically
power down some
blocks.
WDT unlock state
machine requires
flush for subsequent
writes.
0352 and Before 0426 (Continued)
DD
®
Description
Port C GPIO pins are not 5 V-tolerant pins.
Workaround
None. Port C GPIO must use V
LED Drive Level High Register (LEDLVLH) and LED Drive Level Low Register
(LEDLVLL) drive level encoding does not match the specification.
Workaround
Correct drive level encoding is:
00 = 3 mA
01 = not available
10 = not available
11 = 20 mA
WDT oscillator frequency is specified at 10 kHz but actually is 5 kHz.
Workaround
Set WDT reload and timeout delay parameters based on the 5 kHz frequency.
Current metal width does not support target current density specification for
production products.
Workaround
Devices with these date codes (silicon revision AA) are not recommended for
use in high current draw continuous operation applications.
RESET and Port D0 are multiplexed on one package pin. Port D0 is a
general-purpose output-only pin configuration. When switching the Alternate
Function Sub-register PDAF from PD0 output mode (00H) to RESET input
mode (01H) generates a device external reset.
Workaround
None.
Executing the eZ8
into STOP mode.
Workaround
Manually power down blocks using the power control register before entering
STOP mode.
WDT state machine does not return the correct state following a single write
operation.
Workaround
After each WDT write insert an additional dummy write to the WDT control reg-
ister to flush the state machine.
F082A Series Errata (20- and 28-pin) Devices with Date Codes
TM
CPU’s STOP instruction does not fully place the device
IH2
Errata for Z8 Encore! XP
(Port B) levels.
®
F082A Series
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