MC68HC11F1CFN4 Freescale Semiconductor, MC68HC11F1CFN4 Datasheet - Page 85

• Manufacturer Part Number: MC68HC11F1CFN4
• Description: IC MCU 512 EEPROM 4MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11F1CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

PORTF — Port F Data
6.7 Port G
PORTG — Port G Data
DDRG — Data Direction Register for Port G
DDG[7:0] — Data Direction for Port G
6.8 System Configuration Options 2
TECHNICAL DATA
RESET:
RESET:
or Boot:
or Test:
S. Chip
Expan.
RESET:
Port G pins reset to high-impedance inputs except in expanded modes where reset
causes PG7 to become the CSPROG output. Alternate functions for port G bits [7:4]
are chip select outputs. All port G bits are bidirectional and have corresponding data
direction bits.
The GWOM control bit in the OPT2 register disables port G's P-channel output drivers.
Because the N-channel driver is not affected by GWOM, setting GWOM causes port
G to become an open-drain-type output port suitable for wired-OR operation. In wired-
OR mode, (PORTG bits are at logic level zero), pins are actively driven low by the N-
channel driver. When a port G bit is at logic level one, the associated pin is in a high-
impedance state, as neither the N-channel nor the P-channel devices are active. It is
customary to have an external pull-up resistor on lines that are driven by open-drain
devices. Port G can be configured for wired-OR operation in any operating mode.
The system configuration options 2 register controls several configuration parameters.
Bit 6, CWOM, is the only bit in this register that directly affects parallel I/O.
Alt. Pin
Func.: CSPROG
0 = Input
1 = Output
ADDR7
DDG7
Bit 7
Bit 7
PG7
Bit 7
PF7
PF7
0
0
I
CSGEN
ADDR6
DDG6
PG6
PF6
PF6
6
0
6
6
0
I
Freescale Semiconductor, Inc.
For More Information On This Product,
ADDR5
CSIO1
DDG5
PG5
PF5
PF5
5
0
5
5
0
I
PARALLEL INPUT/OUTPUT
Go to: www.freescale.com
ADDR4
CSIO2
DDG4
PG4
PF4
PF4
4
0
4
4
0
I
ADDR3
DDG3
PG3
PF3
PF3
—
0
3
0
3
3
I
ADDR2
DDG2
PG2
PF2
PF2
—
2
0
2
2
0
I
ADDR1
DDG1
PG1
PF1
PF1
—
1
0
1
1
0
I
ADDR0
DDG0
Bit 0
Bit 0
PG0
Bit 0
PF0
PF0
—
0
0
I
$1005
$1002
$1003
6-5