MC68HC908JB12JDW Freescale Semiconductor, MC68HC908JB12JDW Datasheet - Page 267

• Manufacturer Part Number: MC68HC908JB12JDW
• Description: IC MCU 12K FLASH 6MHZ USB 20SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB12JDW

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: SCI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

14.3.2 Data Direction Register A
MC68HC908JB16
Freescale Semiconductor
NOTE:
—
Rev. 1.1
* DDRA7 bit is reset by POR or LVI reset only.
Address:
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic 1 to a DDRA bit enables the output buffer for
the corresponding port A pin; a logic 0 disables the output buffer.
DDRA[7:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 14-4
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA[7:0], configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
DDRA7
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
$0004
Bit 7
0*
Figure 14-3. Data Direction Register A (DDRA)
shows the port A I/O logic.
Input/Output (I/O) Ports
DDRA6
6
0
Figure 14-4. Port A I/O Circuit
RESET
DDRA5
5
0
DDRA4
DDRAx
4
0
PTAx
DDRA3
3
0
DDRA2
2
0
Input/Output (I/O) Ports
DDRA1
1
0
Technical Data
DDRA0
Bit 0
0
PTAx
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