C8051F122 Silicon Laboratories Inc, C8051F122 Datasheet - Page 140

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C8051F122

Manufacturer Part Number
C8051F122
Description
IC 8051 MCU FLASH 128K 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Datasheets

Specifications of C8051F122

Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
On exit from the PCA interrupt service routine, the CIP-51 will return to the ADC2 Window Comparator
ISR. On execution of the RETI instruction, SFR Page 0x00 used to access the PCA registers will be auto-
matically popped off of the SFR Page Stack, and the contents of the SFRNEXT register will be moved to
the SFRPAGE register. Software in the ADC2 ISR can continue to access SFR’s as it did prior to the PCA
interrupt. Likewise, the contents of SFRLAST are moved to the SFRNEXT register. Recall this was the
SFR Page value 0x0F being used to access Port 5 before the ADC2 interrupt occurred. See Figure 11.8
below.
140
Figure 11.7. SFR Page Stack Upon PCA Interrupt Occurring During an ADC2 ISR
Figure 11.8. SFR Page Stack Upon Return From PCA Interrupt
SFRNEXT
SFRNEXT
SFRLAST
SFRLAST
SFRPAGE
popped to
SFRPAGE
SFRNEXT
pushed to
SFRNEXT
popped to
pushed to
stack on return from
SFRPAGE on PCA
pushed on stack in
popped off of the
SFR Page 0x00
(ADC2)
(Port 5)
SFR Page 0x00
(ADC2)
(Port 5)
Automatically
Automatically
(PCA)
0x0F
0x02
0x0F
0x00
0x02
interrupt
interrupt
Rev. 1.4
SFRPAGE
SFRNEXT
SFRPAGE
SFRLAST
SFRNEXT
SFRLAST

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