MC68HC908GR4CFA Freescale Semiconductor, MC68HC908GR4CFA Datasheet - Page 144

• Manufacturer Part Number: MC68HC908GR4CFA
• Description: IC MCU 4K FLASH 8.2MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR4CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Central Processing Unit (CPU)
Technical Data
144
NOTE:
I — Interrupt mask
To maintain M6805 compatibility, the upper byte of the index register (H)
is not stacked automatically. If the interrupt service routine modifies H,
then the user must stack and unstack H using the PSHH and PULH
instructions.
A return from interrupt (RTI) instruction pulls the CPU registers from the
stack and restores the interrupt mask from the stack. After any reset, the
interrupt mask is set and can only be cleared by the clear interrupt mask
software instruction (CLI).
Freescale Semiconductor, Inc.
The CPU sets the half-carry flag when a carry occurs between
accumulator bits 3 and 4 during an ADD or ADC operation. The half-
carry flag is required for binary-coded decimal (BCD) arithmetic
operations. The DAA instruction uses the states of the H and C flags
to determine the appropriate correction factor.
When the interrupt mask is set, all maskable CPU interrupts are
disabled. CPU interrupts are enabled when the interrupt mask is
cleared. When a CPU interrupt occurs, the interrupt mask is set
automatically after the CPU registers are saved on the stack, but
before the interrupt vector is fetched.
After the I bit is cleared, the highest-priority interrupt request is
serviced first.
For More Information On This Product,
1 = Carry between bits 3 and 4
0 = No carry between bits 3 and 4
1 = Interrupts disabled
0 = Interrupts enabled
Central Processing Unit (CPU)
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MC68HC908GR8 — Rev 4.0
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