MC68HC908AP8CB Freescale Semiconductor, MC68HC908AP8CB Datasheet - Page 153

• Manufacturer Part Number: MC68HC908AP8CB
• Description: IC MCU 8K FLASH 8MHZ 42SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AP8CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

TBR[2:0] — Timebase Rate Selection
TACK — Timebase ACKnowledge
TBIE — Timebase Interrupt Enabled
TBON — Timebase Enabled
Freescale Semiconductor
These read/write bits are used to select the rate of timebase interrupts as shown in
The TACK bit is a write-only bit and always reads as 0. Writing a logic 1 to this bit clears TBIF, the
timebase interrupt flag bit. Writing a logic 0 to this bit has no effect.
This read/write bit enables the timebase interrupt when the TBIF bit becomes set. Reset clears the
TBIE bit.
This read/write bit enables the timebase. Timebase may be turned off to reduce power consumption
when its function is not necessary. The counter can be initialized by clearing and then setting this bit.
Reset clears the TBON bit.
1 = Clear timebase interrupt flag
0 = No effect
1 = Timebase interrupt enabled
0 = Timebase interrupt disabled
1 = Timebase enabled
0 = Timebase disabled and the counter initialized to 0’s
TBR2
Do not change TBR[2:0] bits while the timebase is enabled (TBON = 1).
0
0
0
0
1
1
1
1
Table 10-1. Timebase Rate Selection for OSCCLK = 32.768-kHz
TBR1
0
0
1
1
0
0
1
1
MC68HC908AP Family Data Sheet, Rev. 4
TBR0
0
1
0
1
0
1
0
1
Divider
262144
131072
65536
32768
NOTE
64
32
16
8
0.125
1024
2048
4096
Timebase Interrupt Rate
0.25
512
0.5
Hz
1
Timebase Register Description
~0.24
8000
4000
2000
1000
~0.5
ms
~2
~1
Table
10-1.
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