LMP7701MF/NOPB National Semiconductor, LMP7701MF/NOPB Datasheet - Page 16

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LMP7701MF/NOPB

Manufacturer Part Number
LMP7701MF/NOPB
Description
IC OP AMP PREC 12V RRIO SOT23-5
Manufacturer
National Semiconductor
Series
LMP®r
Datasheet

Specifications of LMP7701MF/NOPB

Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
1.1 V/µs
Gain Bandwidth Product
2.5MHz
Current - Input Bias
0.2pA
Voltage - Input Offset
37µV
Current - Supply
790µA
Current - Output / Channel
86mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 12 V, ±1.35 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Number Of Channels
1
Voltage Gain Db
130 dB
Common Mode Rejection Ratio (min)
88 dB
Input Voltage Range (max)
12 V
Input Voltage Range (min)
2.7 V
Input Offset Voltage
0.2 mV at 5 V
Output Current (typ)
42 mA
Operating Supply Voltage
3 V, 5 V, 9 V
Supply Current
1 mA at 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details
Other names
LMP7701MF
LMP7701MFTR
This equation is rearranged to find the location of the two
poles:
As shown in Equation 1, as values of R
the magnitude of the poles is reduced, which in turn decreas-
es the bandwidth of the amplifier. Whenever possible, it is
best to choose smaller feedback resistors. Figure 3 shows the
effect of the feedback resistor on the bandwidth of the
LMP7701/LMP7702/LMP7704.
FIGURE 3. Closed Loop Gain vs. Frequency
Equation 1 has two poles. In most cases, it is the presence of
pairs of poles that causes gain peaking. In order to eliminate
this effect, the poles should be placed in Butterworth position,
since poles in Butterworth position do not cause gain peaking.
To achieve a Butterworth pair, the quantity under the square
root in Equation 1 should be set to equal −1. Using this fact
and the relation between R
and R
, R
1
2
value for R
can be found. This is shown in Equation 2. If R
1
is chosen to be larger than this optimum value, gain peaking
will occur.
In Figure 2, C
is added to compensate for input capacitance
F
and to increase stability. Additionally, C
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nates the gain peaking that can be caused by having a larger
feedback resistor. Figure 4 shows how C
ing.
(1)
and R
are increased,
1
2
FIGURE 4. Closed Loop Gain vs. Frequency with
DIODES BETWEEN THE INPUTS
The LMP7701/LMP7702/LMP7704 have a set of anti-parallel
diodes between the input pins, as shown in Figure 5. These
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
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voltage that is allowed on the input pins. A differential signal
larger than one diode voltage drop might damage the diodes.
The differential signal between the inputs needs to be limited
to ±300 mV or the input current needs to be limited to ±10 mA.
= −A
R
, the optimum
2
V
1
1
(2)
reduces or elimi-
F
16
reduces gain peak-
F
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Compensation
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FIGURE 5. Input of LMP7701

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