P2020DS-PB Freescale Semiconductor, P2020DS-PB Datasheet - Page 2

• Manufacturer Part Number: P2020DS-PB
• Description: BOARD EVALUATION FOR P2020
• Manufacturer: Freescale Semiconductor
• Series: QorlQ™r
• Type: MPUr

Specifications of P2020DS-PB

• Contents: Board
• For Use With/related Products: P2020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Telecom
Features for the market:
• Dual Gigabit Ethernet on SGMII
• Serial RapidIO interface for direct
• Security engine handles the secure network
• Advanced quality of service (QoS) for
Applications:
• AdvancedMC™ card
• Controller on AdvancedTCA
• Channel and control card for 3G NodeB,
• General purpose compute blade
3
(for redundancy) or Serial RapidIO
interface for implementing backhaul
connection to digital signal processors
(DSPs)—for Layer 1 processing
termination requirement
Gigabit Ethernet to assist in scheduling
Layer 2 baseband processing
2G/2.5G BTS IP upgrades, WCDMA,
4G LTE and WiMAX
®
carrier card
®
LTE and WiMAX Baseband
The P2020 and P2010 communications
processors are well-suited for Long-Term
Evolution (LTE) and WiMAX channel card
applications. There are two factors that drive
the need for dual-core performance without
breaking out of a single-core power budget:
• Increased bandwidth per subscriber
• Flattening of the infrastructure hierarchy
Together, these factors increase the
processing requirements of the channel
card. P2 series processors, with dual-
core performance in single-core power
budgets, can increase performance in Layer
2 baseband processing and implementing
network interfaces.
Layer 2 baseband processing implements
the RLC layer that controls the base station
and subscriber access to air interface
resources. The advanced QoS features of the
Gigabit Ethernet ports assist in scheduling
these resources. This Layer 2 processing
includes the medium access control
(MAC), which controls the base station and
subscriber access to air interface resources.
Resources are scheduled according to QoS
Backplane
LTE and WiMAX Baseband
Mbps
500
Serial RapidIO
control and
redundant
Ethernet
Gigabit
data,
RapidIO
Serial
• MAC
• Scheduler
• Serial RapidIO
• Multiple mailboxes
• Port read/write to
• Messaging
messaging unit
configure switch
(inbound/outbound)
local and remote
P2 Series
QorIQ™
requirements using packet concatenation
and segmentation, retransmission through
automatic repeat request (ARQ) and
hybrid automatic repeat request (HARQ) in
combination with Layer 1.
Typically backhaul is implemented with
either dual Gigabit Ethernet on SGMII (for
redundancy) or Serial RapidIO interface, both
of which are supported in the QorIQ P2 series
processors. The Serial Rapid IO interface also
allows direct connection to the DSPs—such
as Freescale’s MSC8144 and MSC8156 four-
and six-core DSPs—that implement the Layer
1 processing. The security block handles the
secure network termination requirement.
This solution performs network backhaul
transport and interworking with internal
interfaces. This includes processing the
network layers up to OSI Layer 3, including
IPsec secure network termination, header
compression and traffic classification
(QoS). The network interface card (NIC)
can optionally support 3G LTE radio link
encryption—however, depending upon the
selected architecture, this could be partitioned
to the channel card.
RapidIO
latency
Serial
x1/x4
Low
Serial RapidIO
Switch
FPGA
Serial RapidIO x1/x4
OBSAI/CPRI
(up to 3.125 GHz)
freescale.com/QorIQ
®
xn DSPs
DSP
DSP
DSP