13192DSK-BDM-A00 Freescale Semiconductor, 13192DSK-BDM-A00 Datasheet - Page 12

KIT STARTER MC13191/92 W/CABLE

13192DSK-BDM-A00

Manufacturer Part Number
13192DSK-BDM-A00
Description
KIT STARTER MC13191/92 W/CABLE
Manufacturer
Freescale Semiconductor
Type
802.15.4/Zigbeer
Datasheets

Specifications of 13192DSK-BDM-A00

Contents
Hardware, Software, Documentation and USB Multilink
Wireless Frequency
2.4 GHz
Interface Type
SPI
Modulation
DSSS OQPSK
Security
128 bit AES
For Use With/related Products
MC13191, MC13192
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Functional Description
12
Although the SPI port is fully static, internal memory, timer and interrupt arbiters require an internal clock
(CLK
registers and memory.
6.2.1
The SPI port of an MCU transfers data in bursts of 8 bits with most significant bit (MSB) first. The master
(MCU) can send a byte to the slave (transceiver) on the MOSI line and the slave can send a byte to the
master on the MISO line. Although an MC13192 transaction is three or more SPI bursts long, the timing
of a single SPI burst is shown in
SPI digital timing specifications are shown in
SPICLK
CE
MISO
MOSI
core
), derived from the crystal reference oscillator, to communicate from the SPI registers to internal
SPI Burst Operation
T5
Baud Rate
Generator
Shift Register
MCU
Valid
1
Valid
T4
T7
T6
Figure 8. SPI Single Burst Timing Diagram
Figure
2
MC13192 Technical Data, Rev. 3.3
Chip Enable (CE)
RxD
TxD
Sclk
8.
Figure 7. SPI Interface
3
Table
Valid
4
6.
T3
SPI Burst
5
SPICLK
T2
MISO
MOSI
CE
T1
6
T0
Shift Register
7
MC13192
Freescale Semiconductor
8

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