T4260-IL Atmel, T4260-IL Datasheet - Page 21

• Manufacturer Part Number: T4260-IL
• Description: IC RECEIVER AM/FM FRONT 44-SSOP
• Manufacturer: Atmel

Specifications of T4260-IL

• Frequency: AM, FM
• Modulation Or Protocol: AM, FM
• Applications: AM/FM Radio Receiver
• Current - Receiving: 85mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 8 V ~ 10 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -

Permitted DAC Conditions
4528J–AUDR–11/04
The offset of DAC1 and DAC2 has a range of approximately +0.98 V to -0.99 V. This
range is divided into 127 steps. One step is approximately 1.97 V/127 = 15.52 mV. The
offset of DAC1 can be controlled by the bits 24 to bit 30 (2
DAC2 can be controlled by the bits 52 to bit 58 (2
Table 27. Offset of DAC1, 2
Note:
The internal operation amplifier of the DACs should not operate with a too high internal
difference voltage at their inputs. This means that a voltage difference higher than 0.5 V
at the internal OP input should be avoided in operation mode. The respective output OP
in the DAC is necessary for the addition and amplification of the tuning voltage (at
pin 18) with the desired voltage gain and offset value.
If the tuning voltage reaches a high value e.g. 9 V, with a gain setting of 2 times VTUNE
and an offset of +1 V, then the output OP of the DAC should reach the (calculated) volt-
age of 19 V. The supply voltage of e.g. 10 V, however, limits the output voltage (of the
DAC) to 10 V maximum.
Due to the (limiting) supply voltage and the internal gain resistance ratio of 6, the miss-
ing 9 V (calculated voltage - V
may not remain for a longer period of time.
As long as the calculated DAC output voltage value does not exceed the supply voltage
value by more than 3 V, no damages should occur during the product’s lifetime as the
input voltage of the internal OP input voltage does not exceed 0.5 V.
VTUNE x DAC gain factor + DAC offset < V
(9 V x 2 + 1 V) < 10 V + 3 V (condition not allowed)
This means when having a gain factor of 2 and an offset value of 1 V, the tuning voltage
should not exceed 6 V.
Maximum tuning voltage < (V
e.g.: maximum tuning voltage = (10 V + 3 V - 1 V)/2 = 6 V
It is also possible to reduce the gain or the offset value instead of (or along with) the tun-
ing voltage.
Approximately
Approximately
Offset DAC1
Offset DAC2
-0.0120 V
-0.9576 V
-0.9733 V
-0.9890 V
0.9815 V
0.9659 V
0.9512 V
0.9353 V
Gain = 58 (intermediate position)
...
...
B30
B58
0
0
0
0
1
1
1
1
S
s
B29
B57
) cause a voltage of 1.5 V at the OP input. This condition
+ 3 V - DAC offset)/DAC gain factor
...
...
0
0
0
0
0
1
1
1
B28
B56
...
...
0
0
0
0
0
1
1
1
S
B26
B55
...
...
0
0
0
0
0
1
1
1
+ 3 V
0
to 2
B26
B54
...
...
0
0
0
0
0
1
1
1
6
) as given in Table 27.
B25
B53
0
...
...
0
0
1
1
0
0
1
1
to 2
6
B24
B52
) and the offset gain of
...
...
0
1
0
1
0
1
0
1
Decimal Offset
Decimal Offset
T4260
125
126
127
64
...
...
0
1
2
3
21