T4260-IL Atmel, T4260-IL Datasheet - Page 9

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T4260-IL

Manufacturer Part Number
T4260-IL
Description
IC RECEIVER AM/FM FRONT 44-SSOP
Manufacturer
Atmel
Datasheet

Specifications of T4260-IL

Frequency
AM, FM
Modulation Or Protocol
AM, FM
Applications
AM/FM Radio Receiver
Current - Receiving
85mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
8 V ~ 10 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
T4260-ILQ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3-wire Bus Description
Figure 3. 3-wire Pulse Diagram
4528J–AUDR–11/04
EN
DATA
CLK
16-bit command
EN
DATA
CLK
24-bit command
EN
DATA
CLK
8-bit command
e.g. R-divider
MSB
MSB
MSB
2
7
2
6
2
5
BYTE 1
BYTE 1
BYTE 1
2
4
2
3
2
The register settings of the T4260 are programmed by a 3-wire bus protocol. The bus
protocol consists of separate commands. A defined number of bits is transmitted
sequentially during each command.
One command is used to program all bits of one register. The different registers avail-
able (see chapter “3-wire Bus Data Transfer” on page 11) are addressed by the length
of the command (number of transmitted bits) and by two address bits that are unique to
each register of a given length. 8-bit registers are programmed by 8-bit commands,
16-bit registers are programmed by 16-bit commands and 24-bit registers are pro-
grammed by 24-bit commands.
Each bus command starts with a falling edge on the enable line (EN) and ends with a
rising edge on EN. EN has to be kept LOW during the bus command.
The sequence of transmitted bits during one command starts with the MSB of the first
byte and ends with the LSB of the last byte of the register addressed. To transmit one bit
(0/1), DATA has to be set to the appropriate value (LOW/HIGH) and a LOW-to-HIGH
transition has to be performed on the clock line (CLK) while DATA is valid. The DATA is
evaluated at the rising edges of CLK. The number of LOW-to-HIGH transitions on CLK
during the LOW period of EN is used to determine the length of the command.
2
2
1
LSB
LSB
LSB
R-Divider
2
0
MSB
MSB
X
X
2
13
2
BYTE 2
12
BYTE 2
2
11
2
10
2
9
LSB
LSB
2
8
MSB
1
Addr.
0
PDFM
PDAM
Fract.
BYTE 3
2
3
VCO-Divider
2
2
2
1
LSB
2
0
T4260
9

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