MC33696FCAER2 Freescale Semiconductor, MC33696FCAER2 Datasheet - Page 27

• Manufacturer Part Number: MC33696FCAER2
• Description: IC UHF RECEIVER PLL TUNED 32-QFN
• Manufacturer: Freescale Semiconductor

Specifications of MC33696FCAER2

• Frequency: 304, 315, 426, 434, 868 & 915MHz
• Data Rate - Maximum: 20kbps
• Modulation Or Protocol: FSK, OOK
• Applications: General Data Transfer
• Power - Output: 7.5dBm
• Sensitivity: -106dBm
• Voltage - Supply: 2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
• Current - Receiving: 10.3mA
• Current - Transmitting: 13mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -

See the FRM bit description
setting carrier frequencies.
See
13.2 State Machine
In transmit mode, the state diagram is reduced to only one state: state 30. The circuit is either waiting for
a digital telegram to send, or is sending one. In this mode, the circuit can be considered as a simple RF
physical interface. The information presented on MOSI is sent directly in RF (according to the selected
modulation), with no internal processing.
Data transmission is possible only if the PLL is within the lock-in range. Therefore, during transmission,
if the PLL switches out of lock-in range, the RF output stage is switched off internally, thereby preventing
data from being transmitted in an unwanted band.
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The SPI is deselected. CONFB is set to high level and STROBE to low level in order to enter this mode.
Nothing is sent and all incoming data are ignored until CONFB and SEB go low to switch back to
configuration mode.
Standby/LVD mode allows minimum current consumption to be achieved. Depending upon the value of
the LVDE bit, the circuit is in standby mode (state 60) or LVD mode (state 5 and 20).
LVDE = 0: The transceiver is in standby; consumption is reduced to leakage current (current state after
POR).
LVDE = 1: The LVD function is enabled; consumption is in the range of tens of microamperes.
The only way to exit this mode is to go back to configuration mode by applying a low level to CONFB and
a high level to STROBE.
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15.1 Description
This mode is used to write or read the internal registers of the MC33696.
As long as a low level is applied to CONFB and a high level to STROBE (see
master node driving the SCLK input, the MOSI line input, and the MISO line output. Whatever the
direction, SPI transfers are 8-bit based and always begin with a command byte, which is supplied by the
MCU on MOSI. To be considered as a command byte, this byte must come after a falling edge on CONFB.
Figure 19
Freescale Semiconductor
Section 10, “MCU
Standby: LVD Mode
Configuration Mode
shows the content of the command byte.
Interface,” for more details about setting the level on the SEB pin.
(Figure
26) and
MC33696 Data Sheet, Rev. 12
Section 18.3, “Frequency
Registers,” for more details about
Figure
2), the MCU is the
Standby: LVD Mode
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