SI4421-A0-FT Silicon Laboratories Inc, SI4421-A0-FT Datasheet - Page 35

• Manufacturer Part Number: SI4421-A0-FT
• Description: IC TXRX FSK 915MHZ 3.8V 16-TSSOP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4421-A0-FT

• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK
• Applications: ISM
• Power - Output: 7dbm
• Sensitivity: -110dBm
• Voltage - Supply: 2.2 V ~ 3.8 V
• Current - Receiving: 15mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1737-5

Sensitive Reset Enabled, Ripple on V
Sensitive reset disabled:
Software reset
Software reset can be issued by sending the appropriate control command (described at the end of the section) to the chip. The
result of the command is the same as if power-on reset was occurred but the length of the reset event is much less, 0.25ms typical.
The software reset works only when the sensitive reset mode is selected.
V
During the reset event (caused by power-on, fast positive spike on the supply line or software reset command), it is very important to
keep the V
getting out from reset state. To avoid this phenomenon use adequate filtering on the power supply line to keep the level of the
disturbing signal below 100mV
regulator is used to supply the radio, switching noise may be present on the V
how to decrease the ripple of the regulator IC and/or how to shift the switching frequency.
Related control commands
FIFO and Reset Mode Command (page 20)
SW Reset Command
dd
line filtering
Setting bit<0> to high will change the reset mode to normal from the default sensitive.
Issuing FE00h command will trigger software reset (sensitive reset mode must be enabled). See the Wake-up Timer
Command (page 25).
dd
line as smooth as possible. Noise or periodic disturbing signal superimposed the supply voltage may prevent the part
output
output
nRes
nRes
250mV
1.6V
H
L
H
L
V
V
p-p
dd
dd
in the DC – 50kHz range for 200ms from V
dd
:
Reset threshold voltage
Reset threshold voltage
(600mV)
(600mV)
dd
dd
ramp start.. Typical example when a switch-mode
line. Follow the manufacturer’s recommendations
Reset ramp line
(100mV/ms)
Reset ramp line
(100mV/ms)
time
time
Si4421
35