MC13192FC Freescale Semiconductor, MC13192FC Datasheet
MC13192FC
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MC13192FC Summary of contents
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... Rev. 3.3, 04/2008 MC13192 Package Information Plastic Package Case 1311-03 (QFN-32) Ordering Information Device Device Marking MC13192FC 13192 MC13192FCR2 13192 (Tape and reel) Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . 4 4 Data Transfer Modes . . . . . . . . . . . . . . . . . . . 5 5 Electrical Characteristics . . . . . . . . . . . . . . . 7 6 Functional Description . . . . . . . . . . . . . . . . 11 7 Pin Connections . . . . . . . . . . . . . . . . . . . . . . 14 8 Applications Information ...
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... Onboard trim capability for 16 MHz crystal reference oscillator eliminates need for external variable capacitors and allows for automated production frequency calibration. • Seven general purpose input/output (GPIO) signals • Operating temperature range: -40 ° °C • Small form factor QFN-32 Package 2 MC13192 Technical Data, Rev. 3.3 Freescale Semiconductor ...
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... Supports GTS for low latency • Multiple power saving modes (idle doze, hibernate) 2.1.3 ZigBee-Compliant Network Stack • Supports ZigBee 1.0 specification • Supports star, mesh and tree networks • Advanced Encryption Standard (AES) 128-bit security Freescale Semiconductor MC13192 Technical Data, Rev. 3.3 Features 3 ...
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... V DDIN T C ontrol R egulator L Lo gic Digital P roc DDD R e gulato tal R egulator DDV egulator A rbiter equ enc e M ana ger (C o ntrol L ogic ) bol rbiter G ene ra tion Microcontroller ROM SPI (Flash) RAM CPU A/D Application Network MAC PHY Driver Freescale Semiconductor ...
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... If the MC13192 is in streaming mode, the MCU is notified by an interrupt on a word-by-word basis. Figure 4 shows CCA reported power level versus input power. Note that CCA reported power saturates at about -57 dBm input power which is well above 802.15.4 Standard requirements. Freescale Semiconductor 1 byte 125 bytes maximum FLI Payload Data Figure 3 ...
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... Figure 5. Reported Power Level Versus Input Power for Energy Detect or Link Quality Indicator 6 802.15.4 Accuracy and range Requirements -80 -70 -60 Input Pow er (dBm) NOTE 802.15.4 Accuracy and Range Requirements -75 -65 -55 -45 -35 Input Power Level (dBm) MC13192 Technical Data, Rev. 3.3 -50 -25 -15 Freescale Semiconductor ...
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... Note: Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics or Recommended Operating Conditions tables. Note: ESD protection meets Human Body Model (HBM kV. RF input/output pins have no ESD protection. Freescale Semiconductor Table 1. Absolute Maximum Ratings Symbol V ...
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... GHz ° DDINT 70 DDINT V DDINT - - 8.0 MHz - - 10 dBm 16 MHz Only Min Typ Max - 0.2 1.0 - 1.0 6 102 - 500 800 - ± 30% V DDINT 70 DDINT V DDINT 80 DDINT V DDINT 0 - 20% V DDINT Section 8.4, “Low Power Freescale Semiconductor Unit µA µA µA µ µ ...
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... Output Power Control Range (-27 dBm to +4 dBm typical) Over the Air Data Rate 2nd Harmonic 3rd Harmonic 1 SPI Register 12 programmed to 0x00BC which sets output power to nominal (0 dBm typical). 2 SPI Register 12 programmed to 0x00FF which sets output power to maximum. Freescale Semiconductor NOTE = 2 ° MHz, unless otherwise noted. A ref Symbol ...
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... C6 0.1uF J1 R1 47k PA2 9 10 RXD GPIO1 GPIO2 10k IRQ MHz CLK 25 26 Baud SEL MCU RESET RTXENi 33 34 ATTN MOSI 35 36 SPI_CLK MISO VCC 47k MCU Interface ABEL RESET CLKO R6 47k R5 47k Freescale Semiconductor Unit Wake CLOCK Sel RESET ...
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... CPHA = 0 and the clock polarity control bit CPOL = 0. 3. Master Out/Slave In (MOSI) - Incoming data from the host is presented on the MOSI input. 4. Master In/Slave Out (MISO) - The MC13192 presents data to the master on the MISO output. A typical interconnection to a microcontroller is shown in Freescale Semiconductor 7. Current drain in the various modes is listed in Definition NOTE Figure MC13192 Technical Data, Rev ...
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... MOSI Valid SPI digital timing specifications are shown in 12 RxD MISO TxD MOSI Sclk SPICLK Chip Enable (CE) Figure 7. SPI Interface Figure 8. SPI Burst Valid T3 Figure 8. SPI Single Burst Timing Diagram Table 6. MC13192 Technical Data, Rev. 3.3 MC13192 Shift Register Freescale Semiconductor ...
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... Refer to the MC13192 Reference Manual, (MC13192RM) for more details on SPI registers and transaction types. An example SPI read transaction with a 2-byte payload is shown in CE Clock Burst SPICLK MISO MOSI Freescale Semiconductor Valid Valid Header Read data Figure 9. SPI Read Transaction Diagram MC13192 Technical Data, Rev. 3.3 Functional Description Figure 9 ...
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... Master In/Slave Out. Dedicated SPI data output. Active Low Chip Enable. Enables SPI transfers. MC13192 Technical Data, Rev. 3.3 Functionality Tie to Ground for normal operation See Footnote 1 See Footnote 1 See Footnote 1 See Footnote 1 See Footnote 2 See Footnote 2 See Footnote 2 See Footnote 2 See Footnote 3 See Footnote 2 Freescale Semiconductor ...
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... During low power modes, input must remain driven by MCU default MISO is tri-stated when CE is negated. For low power operation, miso_hiz_en (Bit 11, Register 07) should be set to zero so that MISO is driven low when CE is negated. Freescale Semiconductor Description Active Low Interrupt Request. Digital regulated supply bypass. ...
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... Pin Connections 32 1 RFIN- 2 RFIN PAO+ 6 PAO GPIO4 MC13192 Figure 10. Pin Connections (Top View) MC13192 Technical Data, Rev. 3 GPIO6 23 GPIO5 22 VDDINT 21 VDDD 20 IRQ MISO 17 MOSI 16 Freescale Semiconductor ...
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... SPI and observing the frequency at CLKO. Each internal trim load capacitor has a trim range of approximately steps. Initial tolerance for the internal trim capacitance is approximately ±15%. Freescale Semiconductor MC13192 Technical Data, Rev. 3.3 Applications Information 17 ...
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... Idle” indicator and GPIO2 functions as a “CRC Valid” / Clear Channel Assessment (CCA) result indicator and are not available for general purpose use. 18 Table 10) and the 6.8 pF load capacitors shown are used Section 8.3, “Crystal Requirements. MC13192 Technical Data, Rev. 3.3 Table 9 lists Freescale Semiconductor ...
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... Freescale Semiconductor Figure 11. MC13192 Configured With a MCU MC13192 Technical Data, Rev. 3.3 Applications Information 1 19 ...
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... Unit 16.000000 MHz 2 ± 10 ppm 3 ± 15 ppm ± 2 ppm 5 Ω MC13192 Technical Data, Rev. 3.3 Manufacturer Printed wire Freescale Semiconductor NEC KDS, Daishinku Corp Murata Table 10. A number of the stated 1 Condition at 25 °C Over desired temperature range max max Freescale Semiconductor ...
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... IRQ that signifies the modem is ready and in Idle mode; this can prevent a possible extraneous false interrupt request. – CLKO - is always an output. During Hibernate CLKO retains its output state, but does not toggle. During Doze, CLKO may toggle depending on whether it is being used. Freescale Semiconductor 1 (continued) Value Unit < ...
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... As stated above all unused GPIO should be programmed as outputs low for lowest power and no floating inputs. — MC9S08GT devices have IO signals that are not pinned-out on the package. These signals must also be initialized (even though they cannot be used) to prevent floating inputs. 22 MC13192 Technical Data, Rev. 3.3 Freescale Semiconductor ...
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... 0.5 32X 0.3 VIEW M-M ( (1.73) 0.065 32X 0.015 (0.25) DETAIL N PREFERRED CORNER CONFIGURATION 4 DETAIL T DETAIL M BACKSIDE PIN 1 INDEX OPTION Figure 12. Outline Dimensions for QFN-32, 5x5 mm Freescale Semiconductor 0 NOTES: B DETAIL M PIN 1 INDEX 32 1 0.25 0.5 28X 0.30 32X 0.18 M 0.1 ...
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... Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase ...